LG CRD-8161B Service Manual Download Page 3

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1. CABINET and CIRCUIT BOARD

DISASSEMBLY

1-1. Bottom Chassis

A. Release 4 screws (A) and remove the Bottom

Chassis in the direction of arrow (1).
(See Fig. 1-1)

1-2. Front Bezel Assy

A. Release 4 stoppers and remove the Front Bezel

Assy.

1-3. Top Case and Chassis Mecha

A. Release 2 hooks (a) and remove the Top Case in

the direction of arrow (2).

B. Release 4 screws (B) and remove the Chassis

Mecha in the direction of arrow (3)

1-4. Main Circuit Board.

A. Remove the Main Circuit Board in the direction of

arrow (4).

B. At this time, be careful not to damage the 4

connectors of the Main Circuit Board.

Bottom
Chassis

(1)

(A)

Fig. 1-1

Chassis

Mecha

Top Case

Hooks (a)

(B)

(2)

(3)

(B)

Fig. 1-3

Main

Circuit Board

4 Connectors

(4)

Fig. 1-4

Front Bezel Assy

Stoppers

Fig. 1-2

DISASSEMBLY

Summary of Contents for CRD-8161B

Page 1: ...ts 1X and 16X Rotational Modes Max 2 400KB sec Sustained Transfer rate Photo CD Multisession Disc Spec compliant Multimedia MPC 3 Spec compliant Power Disc Loading Ejection Mechanism 1 Way Eject support Eject Button Closed Enclosure Built in ATAPI Interface Controller Software Volume Control 4 Times Digital Filter for CD Audio Built in MODE 1 ECC EDC MTBF 125 000h POH at 10 Utilization PIO Mode 4 ...

Page 2: ...CD disc Figure 1 Front View 1 2 5 4 6 3 BACK VIEW 1 Digital Audio Ouput Connector This is a digital audio output connector or Video CD output connector You can connect this to the digital audio system or Video CD Board 2 Analog Audio Output Connector The Audio Output Connector connects to a sound card The supplied audio cable is a SoundBlaster type cable If you have a different sound card you must...

Page 3: ...oks a and remove the Top Case in the direction of arrow 2 B Release 4 screws B and remove the Chassis Mecha in the direction of arrow 3 1 4 Main Circuit Board A Remove the Main Circuit Board in the direction of arrow 4 B At this time be careful not to damage the 4 connectors of the Main Circuit Board Bottom Chassis 1 A A A A Fig 1 1 Chassis Mecha Top Case Hooks a B B B 2 3 B Fig 1 3 Main Circuit B...

Page 4: ...e 2 screws F H Remove the Pick Up Unit in the direction of arrow 5 NOTE When reassembling the Timing Gear and the Elevator gear align the mark of Timing Gear with the mark o of Elevator Gear 2 2 Pick Up A Release 1 screw G B Remove the Pick Up Mechanism Assy Stopper R Pick UP Unit Elevator Gear Loading Gear Elevator Cover Timing Gear Loading Belt E C F F D 5 Fig 2 1 Pick Up Unit Pick Up G Fig 2 2 ...

Page 5: ...00 02 16 and then pause 2 Trouble List Circuit In the Initial Lead in Operation Mode A LED doesn t light B Pick Up doesn t move to the inner track C Disc doesn t rotate D The Laser RED of Pick Up doesn t light E Pick Up lens doesn t move up and down F TOC isn t read The state LED is not disappear In the Operation Mode G Jump is unstable Noises are occurred H During the Access Pick Up slides innerm...

Page 6: ...e IC401 pin Replace IC401 Replace IC401 Does Disc rotate Does the signal appear in the FOK TP10 IC501 pin Replace IC501 Replace IC501 Replace IC501 Replace IC201 Does the signal appear in the TP1 TP2 Replace IC203 Replace MD Assy Sled Motor is defective Replace X401 YES YES YES YES YES YES YES YES YES YES YES NO NO NO NO NO NO NO NO NO NO NO A B C 48 45 106 46 Dose the signal appear in the MDP TP1...

Page 7: ...02 pin LD 2 2V Replace IC102 1 Replace MD Assy Laser Diode of the Pick Up is defective Replace MD Assy Focus actuater coil of the Pick Up is defective Focus Servo is unstable Is the Tracking Servo On Does TEO TP13 signal appear NO Tracking Servo is unstable Replace IC501 MD Assy or Main Circut Board Is the Spindle Servo On Does MDP TP17 Signal appear NO Spindle Servo is unstable Is TOC area on the...

Page 8: ...ent When the headphon volume is not controlled 1 Replace VR301 Others Video CD is not played screen is abnormal or some title is not played Troubles for Compatibility 5 When the data read failure of CD ROM Disc 1 Check the CD ROM Disc 2 Check the IC s in the decoder and interface circuit a DRAM IC601 b CD ROM Decoder E IDE Controller IC602 c Microprocessor IC401 G H I J J 1 K Does PWM signal appea...

Page 9: ...will be loaded by the synchronized IOW signal active low IOCS16 depends on the quantity of Data word or byte that is if word that signal was enabled IORDY depends on the transfer rate of Host Dn 3 Dn 2 Dn 1 Dn D0 D1 7 Read I F Signal Flow Drive Host Above figure is timing flow presented data transfer from Drive to Host And the followings are those conditions 1 When the Host read the data from Driv...

Page 10: ...OST CONTROL FILTER CONTROL VCR CONTROL MODE SW VCR LPF MIXER DELAY LPF HPF BOOST VS VC Vcc 44p HOLD PEAK BOT VCR VCR LD PD A B C D GND NC GND E FE B FE VC TE C TE TE1 F MIRR T CP MIRR Vcc RFO 2 RFO 1 MODE 2 MODE 1 RFO RFI SUM OUT EQ IN RF C BST C FC C APC ON VC VC VC VC VC VC VC VC 18k 44k 39k 80k 80k 80k 80k 22k 51k Vcc 1 25V MODE1 10P APC ON 56k 1k 56k 1 25V 10k 10k 10k 55k 10k 40k 40k 40k 40k 7...

Page 11: ...l Peak Hold Value 18 CP I Mirror Hold Capacitor Input Mirror Comparator non Invertor Input 19 MIRR O Mirror Comparator Output 20 Vcc Vcc 21 RFO2 O Buffer Switch Output Control in 23 and 24 pin 22 RFO1 O RF Equalizer Output 23 MODE 2 I 24 MODE 1 I 25 APC ON I APC Amp on off Switching 26 FCC I RF Equalizer LPF Cutoff Frequency Setting Pin 27 BSTC I RF Equalizer High Frequency Boost Setting Pin 28 RF...

Page 12: ... A2 A1 Hall 1 Hall 2 Hall 3 GND H1 H1 H2 H2 H3 H3 HALL AMP _ _ _ _ _ _ _ R D Q Q CK Hall Bias FIN RNF RNF VM Vcc2 Vcc1 PG PS EC ECR FR CNF VH PS TORQUE SENSE AMP Vcc Vcc1 SERVO SIGNAL VM CURRENT SENSE AMP TSD Vcc TL 23 R NF V M V CC 2 V CC 1 PG PS EC E CR GND H 1 H 2 H 1 H 2 H 3 H 3 FR N C SB C NF V H N C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 A3 A2 A1 N C N C N...

Page 13: ...T OP2OUT T S D VM1 SOUT1 SIN1 IN1 IN1 R2 5V C2 C2 R4 R3 R3 R4 C1 5k 5k 5k 10k 10k 10k 10k 12 5k 12 5k 12 5k 12 5k 5k 5k 10k 10k 5k 5k 2 5k 2 5k 2 5k 2 5k 2 5k 12 5k 12 5k 12 5k 12 5k 12 5k 2 5k 12 5k 2 5k 12 5k 2 5k 4k 25k 12 5k 10k 10k 12V 5k 5k 10k 10k 10k 12V 10k 5k _ VCTL4 TRAY TRAVERS E M M 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 2...

Page 14: ... DVSS5 NC VCOO VCOI TEST TES2 TES3 PDO VCKI V16M AVDD2 IGEN AVSS2 ADIO RFDC CE TE NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 NC NC SE FE VC VPCO1 VPCO2 VCTL FILO FILI PCO CLTV AV SS 1 RFAC BIAS ASYI ASYO AV DD 1 NC DV DD 1 DV SS 1 ASYE PSSL WDCK LRCK LRCKI DA16 PCMDI DA15 BCKI DA14 DA13 DA12 DA11 NC NC 110 111 112 113 114 115 116 117 11...

Page 15: ...F AO2R Error corrector CLV processor Timing Generator 2 SIGNAL PROCESSOR BLOCK SERVO BLOCK OSC Digital PLL Vari Pitch double speed EFM Demodulator Timing Generator 1 Subcode P W Processor Subcode Q Processor Noise Shaper 18 times oversampling filter Servo interface MIRR DFCT FOK Register Address generator Priority encoder D A data processor Peak detector Digital out Serial parallel Processor PSSL ...

Page 16: ...try circuit ON OFF L OFF H ON 23 PSSL I Input used to switch the audio data output mode L serial H parallel 24 WDCK O 1 0 D A interface for 48 bit slot Word clock f 2Fs 25 LRCK O 1 0 D A interface for 48 bit slot LR clock f Fs 26 LRCKI I LR clock input to DAC 48 bit slot 27 DA16 O 1 0 Outputs DA16 MSB when PSSL 1 or serial data from the 48 bit slot 2 s complements MSB first when PSSL 0 28 PCMDI I ...

Page 17: ... frequency demultiplication output Affected by vari pitch 57 C16M O 1 0 16 9344MHz output Subject to vari pitch control 58 DVDD3 Digital power supply 59 MD2 I Digital Out ON OFF control H for ON L for OFF 60 DOUT O 1 0 Digital Out output 61 MUTE I H for muting L for release 62 WFCK O 1 0 WFCK Write Frame Clock output 63 SCOR O 1 0 H when subcode Sync S0 or S1 is detected 64 SBSO O 1 0 Serial outpu...

Page 18: ... CPU 101 CLOK I Serial Data transfer clock input from CPU 102 DVSS4 Digital GND 103 COUT O 1 0 Track number count signal output 104 MIRR O 1 0 Mirror signal output 105 DFCT O 1 0 Defect signal output 106 FOK O 1 0 Focus OK output 111 TESTA Test pin 112 PWMI I Input of spindle control 113 FSW O 1 Z 0 Output used to switch the spindle motor output filter 114 MON O 1 0 Output for spindle motor ON OFF...

Page 19: ... signal issued when a jitter margin of 28F is exceeded by the 32K RAM 22 Pin No Symbol I O Description 123 TRDR O 1 0 Tracking drive output 124 FFDR O 1 0 Focus drive output 125 FRDR O 1 0 Focus drive output 126 DVDD5 Digital power supply 128 VCOO O 1 0 Output of oscillation circuit analog EFM PLL 129 VCOI I Input to oscillation circuit for analog EFM PLL fLOCK 8 6436MHz 130 TEST I Test Pin Normal...

Page 20: ... RAD11 3 ALE RAD13 5 RAD15 6 VSSE 7 DLRCK 8 RAD12 4 DSDATA 9 DBCK 10 DC2PO 11 MCK 13 XOUT 14 XIN 15 VSSI 16 DJPAR 12 SBSO 17 WFCK 18 SUB 19 HRST 21 UD0 22 VSSE 23 UD1 24 EXCK 20 RD3 81 RD2 82 RAD10 83 RD0 85 VSSE 86 RD1 87 RWE 88 ROE 84 VDD 89 RAD14 90 RAD9 91 RAD7 93 VSSE 94 RAD6 95 RAD5 96 RAD8 92 RAD4 97 RAD0 98 RAD1 99 RAD2 100 31 HRD 32 IORDY 33 DMACK 35 VSSE 36 IOCS16 37 HA1 38 HPDIAG 34 HIR...

Page 21: ... P O O O I O O P I I I I I O O O I P I I I I O I I O I O P I O I O I O I O Type I O P I O I I I I O I O I I I P I I O I O 1 P O 2 I O I P I O 2 I O I O I O Comments RAM Address Bus ALE RAM Address BUS RAM Address Bus 44 1kHz L R Strobe Serial Data Serial Bit Clock C2 Pointer Input Drive Jumper RAM Parity Data M Clock X tal OSC Output X tal OSC Input Subcode Interface IDE Host Reset uCOM Data Bus u...

Page 22: ...O I O I O P I O I O I I O I O I O Comments IDE Host Data Bus IDE Host Data Bus ATAPI Reset IDE Host Data Bus IDE Host Data Bus IDE Host Data Bus VSSE IDE Host Data Bus Chip Reset RAM Data Bus Pin No 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 Name RD6 VSSE RD3 RD2 RAD10 ROE RD0 VSSE RD1 RWE VDD RAD14 RAD9 RAD8 RAD7 VSSE RAD6 RAD5 RAD4 RAD0 RAD1 RAD2 Type I O P I O I O O 1 I ...

Page 23: ...to find the track on the Disc 3 RF Signal A B C A B C D RF Signal is converted to Data Signal in DSP IC IC501 Three signals Focus Error Signal Tracking Error Signal and RF Siganl above are I V converted and amplified at the IC102 and than are transmitted to DSP SSP IC IC501 to generate the Servo Control Signal and Data Signal E F A B C Laser spot Red laser Pick Up module Tracking Focusing C C D ...

Page 24: ...MOTOR DRIVE FOCUS COIL TRACKING COIL SLED MOTOR LOADINF MOTOR H8 3396 SYSTEM CONTROLLER LASER PICK UP CXA2556Q RF AMP CXD3000R DSP SSP AUDIO AMP CIRCUITARY HEADPHONE OPTIONAL I F CABLE HOST COMPUTER OTI 911LP DECODER I F V53C8125HK45 DRAM 33 86MHZ 16 934MHz 37MHZ 3 9V 3 9V REG PC POWER 5V 5V 12V 12V 8V GND GND GND GND R CH R CH R CH GND GND L CH L CH L CH A B C D 1 2 3 4 5 8V REG BLOCK DIAGRAM ...

Page 25: ... 050 433 433 021 026 416 407 407 023 022 020 025 011 010 431 433 433 009 408 007 075 074 080 441 441 441 005 068 066 071 059 067 062 076 082 078 063 064 072 073 060 077 061 065 079 081 070 069 069 006 008 016 009 433 015 014 012 431 433 433 PBM00 Main C B A A04 A01 A02 A03 433 441 7 8 EXPLODED VIEW ...

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