H8/3062
(CPU)
FAO, TAO, SAO
DAC
LB11995H
RL5E808
(RICOH)
A ~ H
VRDC
RPOWER
(DAC)
WREN
RFGUP (WR)
RECD1, RECD2
AK8563
(RF)
FE
LPF
DECEFM
XDECEFM
SLLPFN
SLLPFP
TE
TEIN
WPOWER
(DAC)
DAMON(DAC)
AUX1,2,3
LPF
MPP
CE
FPDIN
VWDC
RRF
FVREF
DAMON
WPOWER
VWDC2
HBIAS
SLDOFFSET CE_OFFSET
RFOSADJ VC_REF
HAVCADJ RPOWER
TRAY_CTL
DACS
SCLK
SDATAO
MPW(RICOH)
SW
&
OP-AMP
SPNFG
U, V, W
HU+, HU-
HV+, HV-
HW+, HW-
VCC2,3 : 12V
RFDC(RF)
LA6543M
FCS+, FCS-,
TRK+, TRK-
FPDOUT
VCO FILTER
SENS, COUT, FOK, LOCK
SQSO, SQCK, SQSY(SCOR)
AUDIO
CONTROL
CXD3011R-1
(DSP)
AO1F, AO1R, AO2F, AO2R, AUGND
LOUT
AUGND
ROUT
AUD_MUTE(CPU)
SCLK, SDATAO
XLAT, DATA, CLOK
WFCK, LRCK, BCLK, MDATA
*
C2PO, SCOR
SBSO
LRCKI, BCLKI, PCMDI
*
EXCK
EFM1
EFM2
ENCEFM
WGATE
ROPC1
RESAMP
WRITE
H/W
WFPDSH, RFPDSH, MPDSH, SPDSH,WBLSH ,WLDON,W/XR,ODON
ATAPI
/CXDCS,
XMRST
XMRST
(CPU)
/AKCS, SCLK, SDATAO
WLDON
(WR)
WR/RE
(CPU)
DFCT2
(DSP)
RFAC
(DSP)
PEAK
DETECT
DFCT2
WRHLD(RF)
DFCT
SPINDLE DRIVE
DEFECT DETECTION
AUDIO CONTROL
POWER
SOURCE
12V
( ACT DRV ) 8V
(A, D, L, H, AD) 5V
(DSP) 4V
(RICOH) 3.3 V
2V, 2.5V
POWER SOURCE
HOST I/F
P/U UNIT
RFAC(RF)
MDP(DSP)
WRHLD
BUFFER
(2M)
WREF
RECDIN
R-C
GUP1
RREF
VRDCN
VRDC
XRST
LPF
ATFG
MUTE
12Ch-DAC
12V, 5V(A),
4V, 2.5V, VC2V
12V, 8V,
5V(D), VC2V
/CS0RL, /CS1RL, /SREB ,/SWEB
SRDY, SINT0, SINT1
SD[7:0], SA[7:0](DATA LINE & ADDRESS)
SPREV (REVDET) SPFG(FGIN)
MPWM, SPBRK(SBRK) DMCON
SPINDLE DRIVER
DMCON (RICOH)
WBLIN
+3V
HAVCADJ
(DAC)
5V(H),3.3V
CDR/RW
ODOFF
WR/RE
(LAT)
ROPC
OPC
RRF
MPXO
ADC BLOCK
VC2V
MPXO
SLDADJ
BLEVEL0,2
ASYM1, ASYM2
ATSY
RFGUP
(WR)
XX
LDON(CPU)
W/XR,ODON (WR)
SPN8/12CM, SPN_PHASE, SPN_BOOST
DOUT
MONIT
/EPCS
SCLK
SDATAO
PWRCTL1
MA/SL
/LOAD_SW, /OPEN_SW
RFGUP
(RF)
/EJECT_KEY, /PLAY_KEY
SLED FG
SPEED GEN.
AMP
H1+, H1-, H2+, H2-
TRYLD+, TRYLD-
SD+, SD-
SUMMING
AMP
SLDFG(CPU)
TRAY_CTL(DAC)
TRAY_MUTE(LAT)
ACT_MUTE(CPU)
SLD_MOVE( CPU )
SLD_OUT
ACTUATOR, SLED, & TRAY DRIVE
HALL BIAS ( DAC )
SE
LPF
FE,TE,CE
FE, TE, CE (RF)
SERVO ERROR INPUT
SPNREV, SPNFG
SBRK (RICOH)
SENSCLK,
AMP
RFOSADJ(DAC)
MIRR_RRW
RFDC(DSP)
WREN(WR)
VCREF : 2.5V
VREFIN : VC2V
TE
LPF
LPF
WRHLD
GUP2,3*
ATIPGUP*, AGCON
I/V AMP
VWDCN
VWDC2(DAC)
VRDC
VWDC
Control
WRF
EEPROM
SDATAI (CPU)
FE
FLASH
WRITE
FWE_ON
FWE
CDR/RW
ASYMCLR
(LAT)
RESAMP
ROPC2 (RICOH)
SA6, SA7
SD[7:0}
/SWEB
/CSMOD
PWRCTL1
MD2
SPNON
74HC374
&
DECODER
(LAT)
CDR/RW (LAT)
PUVC
VC_CE_OFFSET
( DAC )
FPDO
RRF
DRC
XTOR
A,B,C,D
E,F,G,H
(P/U)
VREFOUT : 2V
SAO
HALL1
INV
LPF
TE
SLDOFFSET ( DAC )
CE_OFFSET (DAC )
AGCON
SW
EEFS
RFCK(DSP)
ADTRG
WR/RE (LAT)
SW
LOCK
MONIT
MIRR
SW
MIRR
MIRR_RRW
RRWMODE
(LAT)
CXA8064N
AMP
2V
SAO
VC_REF(DAC)
VC2V
VC_CE_OFFSET
( CPU ADC )
SW
CE
SLDSEL (LAT)
SW
SLDADJ
(CPU ADC)
SLDSEL (LAT)
VC2V
VC2V
VREF
VC2V
MPXO
SLDADJ
XTSL (LAT)
ATSY
A
B
C
D
E
F
G
H
1
2
3
4
5
COMPENSATOR
79
80
2. Signal Flow Diagram