MachXO3-9400 Development Board
Evaluation Board User Guide
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.
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28
FPGA-EB-02004-1.0
Note:
The LEDs are not lined up in sequence, as shown in
Figure 7.4
.
Figure 7.4. Board LEDs
7.4.
LVDS Outputs Pins
The MachXO3-9400 Development Board provides nine pairs of unused LVDS outputs pins that are connected to test
points for possible customer applications. The LVDS test points are detailed in
Table 7.4
.
Table 7.4. LVDS Test Points
Signal Name
MachXO3 Ball Location
Test Point
Comments
LVDS_OUT0_P
B1
TP63
LVDS output pair 0
LVDS_OUT0_N
A2
TP64
LVDS_OUT1_P
B2
TP65
LVDS output pair 1
LVDS_OUT1_N
A3
TP66
LVDS_OUT2_P
B3
TP67
LVDS output pair 2
LVDS_OUT2_N
A4
TP68
LVDS_OUT3_P
B4
TP69
LVDS output pair 3
LVDS_OUT3_N
A5
TP70
LVDS_OUT4_P
B5
TP71
LVDS output pair 4
LVDS_OUT4_N
A6
TP72
LVDS_OUT5_P
B6
TP73
LVDS output pair 5
LVDS_OUT5_N
A7
TP74
LVDS_OUT6_P
B8
TP75
LVDS output pair 6
LVDS_OUT6_N
A8
TP76
LVDS_OUT7_P
B9
TP77
LVDS output pair 7
LVDS_OUT7_N
A9
TP78
LVDS_OUT8_P
B11
TP79
LVDS output pair 8
LVDS_OUT8_N
A11
TP80