mITX-SKL-H – User Guide, Rev.1.1
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Function
Second level Sub-screen / Description
PCI Express
Configuration>
(continued)
PCIe Root Port #
Links to I211 Eth2
2 – Links to I211 Eth3
3
4
6 – links to I211 Eth1
7
8
9
13
14
15
16
17
21
22
23
24
(continued)
CTO>
Enable/disable PCI Express completion timer
T0
SEFE>
Enable/disable Root PCI Express system error
on fatal error
SECE>
Enable/disable Root PCI Express system error
on correctable error
PME SCI>
Enable/disable PCI Express PME SCI
Hot Plug>
Enable/disable PCI Express hot plug
Advanced Error Reporting> Enable/disable advanced error reporting
PCIe Speed>
Configures PCIe speed
Transmitter Half Swing>
Enable/disable transmitter half swing
Detect Timeout>
The number of milliseconds (ms) reference
code waits for link to exit Detect state for
enable ports before assuming there is no
device and potentially disabling.
Extra Bus Reserved>
Extra bus reserved (0-7) for bridges behind
this root bridge
Reserved Memory>
Reserved memory for this root bridge
(1-20) MB
Reserved I/O>
Reserved I/O (4K/ 8K/ 12K/ 16K/ 20K) range
for this root bridge
PCH PCIE# LTR>
Enable/disable PCH PCIE latency reporting
Snoop Latency Override>
Snoop latency override for PCH PCIE
Non Snoop Latency
Override>
Non snoop latency override for PCH PCIE
Force LTR Override>
Force LTR override for PCH PCIE
PCIE1 LTR Lock>
PCIE LTR configuration Lock
PCIE# CLKREQ Mapping
Override>
PCIE CLKREQ override for default platform
mapping
Extra
Options>
Detect Non-
Compliance
Device>
Detect non-compliance PCI Express device
Prefetchable
Memory>
Prefetchable memory range for this root
bridge
Reserved
Memory
Alignment>
Reserved memory alignement (0-31 bits)
Prefetchable
Memory
Alignment>
Prefetchable memory alignement (0-31 bits)
SATA and RST
Configuration>
SATA Controller>
Enable/disable SATA device
SATA Mode Selection>
Determines SATA controllers operation
