5 CPU, Chipset and Super I/O
Kontron User's Guide EPIC/CE
21
Integrated SDRAM Controller
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32MB to 512MB using 16Mb/64Mb/128Mb/256Mb technology
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64-bit data interface
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100/133MHz system memory bus frequency
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Support for Asymmetrical SDRAM addressing only
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Support for x8 and x16 SDRAM device width
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Un-buffered, non-ECC SDRAM only supported
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Refresh Mechanism: CBR ONLY supported
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Enhanced Open page arbitration SDRAM paging scheme
Integrated Graphics Controller
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3D Hyper Pipelined Architecture
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Full 2D H/W Acceleration
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Motion Video Acceleration
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Mip Maps with Trilinear and Anisotropic Filtering
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85MHz Flat-Panel Monitor/Digital CRT Interface Or Digital Video
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Integrated 24-bit 230MHz RAMDAC
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Gamma Corrected Video
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DDC2B Compliant
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Up to 1600x1200 in 8-bit Color at 85Hz Refresh
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Hardware Accelerated Functions
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3 Operand Raster Bit BLTs
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64x64x3 Color Transparent Cursor
Power-Management Functions
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Stop Clock Grant and Halt special cycle translation from the host to the hub interface
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ACPI compliant power management
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APIC buffer management
Summary of Contents for EPIC/CE
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Page 88: ...25 Appendix C Block Diagram Kontron User s Guide EPIC CE 88 25 Appendix C Block Diagram...
Page 93: ...27 Appendix E Connector Layout Kontron User s Guide EPIC CE 93 27 2 Bottom Side...