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Kontron CP6003-SA, User Manual

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Kontron CP6003-SA User Manual Download Page 66

Functional Description

CP6003-SA

Page 2 - 30

ID 1044-9757, Rev. 2.0

P R E L I M I N A R Y

The following table describes the signals of the J3 connector.

 

  

Table 2-23:  CompactPCI Rear I/O Connector J3 Signals

SIGNAL

DESCRIPTION

SP0

COMA signaling (RS-232)

SP1

COMB signaling (RS-422)

VGA

Graphic signaling

USB0 to USB3

USB Port signaling

SPEAKER

Standard PC speaker

FAN

Fan speed sensoring

DEBUG

Debug output

LPa

Rear I/O LAN Port A

LPb

Rear I/O LAN Port B

Note ...

The VGA interface can be used both on the front panel and on the rear I/O.
However, the VGA signals are switched to front I/O or rear I/O, depending on
the uEFI BIOS setting.

Note ...

COMA can be used either on the front panel or on the rear I/O. It is not
possible to use COMA on the front panel and on the rear I/O simultaneously.

Summary of Contents for CP6003-SA

Page 1: ...t s Kontron User Guide P R E L I M I N A R Y CP6003 SA 6U CompactPCI Processor Board based on the 2nd Generation Intel Core i7 i5 Processor with the Intel QM67 Express Chipset Doc ID 1044 9757 Rev 2 0...

Page 2: ...ll data is for information purposes only and not guaranteed for legal purposes Information has been carefully checked and is believed to be accurate however no responsibility is assumed for inaccuraci...

Page 3: ...xv Special Handling and Unpacking Instructions xv General Instructions on Usage xvi Two Year Warranty xvii 1 Introduction 1 3 1 1 Board Overview 1 3 1 2 Board Specific Information 1 4 1 3 System Expa...

Page 4: ...ure Status LEDs 2 8 2 10 1 3 General Purpose LEDs 2 9 2 10 2 DIP Switches SW1 SW2 and SW3 2 11 2 10 3 USB Interfaces 2 11 2 10 3 1 USB Connectors J6 and J7 2 12 2 10 4 Integrated Graphics Controller 2...

Page 5: ...equirements 3 3 3 2 CP6003 SA Initial Installation Procedures 3 4 3 3 Standard Removal Procedures 3 5 3 4 Hot Swap Procedures 3 6 3 4 1 System Master Hot Swap 3 6 3 4 2 Peripheral Hot Swap Procedure 3...

Page 6: ...13 4 4 10 Board and PLD Revision Register BREV 4 14 4 4 11 Geographic Addressing Register GEOAD 4 14 4 4 12 Watchdog Timer Control Register WTIM 4 15 4 4 13 Board ID Low Byte Register BIDL 4 17 4 4 14...

Page 7: ...4 6 2 2 2 Clock Modulation 6 4 6 2 3 Catastrophic Cooling Failure Sensor 6 5 6 3 Chipset Thermal Monitor Feature 6 5 6 4 External Thermal Regulation 6 6 6 4 1 Operational Limits for the CP6003 SA 6 8...

Page 8: ...Preface CP6003 SA Page viii ID 1044 9757 Rev 2 0 P R E L I M I N A R Y This page has been intentionally left blank...

Page 9: ...11 Pinout of GbE Connectors J10 J11 and J12 2 15 2 12 SATA Connector J14 Pinout 2 16 2 13 PMC PCI PCI X Configuration 2 17 2 14 PMC Connectors J22 and J24 Pinout 2 19 2 15 PMC Connectors J21 and J23...

Page 10: ...PLD Revision Register BREV 4 14 4 17 Geographic Addressing Register GEOAD 4 14 4 18 Watchdog Timer Control Register WTIM 4 16 4 19 Board ID Low Byte Register BIDL 4 17 4 20 LED Configuration Register...

Page 11: ...rs J10 J11 and J12 2 15 2 5 SATA Connector J14 2 16 2 6 PMC Connectors J21 J22 J23 and J24 2 18 2 7 XMC Connector J20 2 21 2 8 CompactPCI Connectors J1 J5 2 24 3 1 Connecting a Peripheral Device to th...

Page 12: ...Preface CP6003 SA Page xii ID 1044 9757 Rev 2 0 P R E L I M I N A R Y This page has been intentionally left blank...

Page 13: ...ontron reserves the right to change modify or improve this document or the product described herein as seen fit by Kontron without further notice Trademarks Kontron the PEP logo and if occurring in th...

Page 14: ...D Sensitive Device This symbol and title inform that electronic boards and their compo nents are sensitive to static electricity Therefore care must be taken during all handling operations and inspect...

Page 15: ...ools This is most easily done by touching a metal part of your system housing It is particularly important to observe standard anti static precautions when changing piggy backs ROM devices jumper sett...

Page 16: ...ic environmental requirements This applies also to the operational temperature range of the specific board version which must not be exceeded If batteries are present their temperature restrictions mu...

Page 17: ...refund the original cost of purchase if appropriate In the event of repair re funding or replacement of any part the ownership of the removed or replaced parts reverts to Kontron and the remaining pa...

Page 18: ...Preface CP6003 SA Page xviii ID 1044 9757 Rev 2 0 P R E L I M I N A R Y This page has been intentionally left blank...

Page 19: ...CP6003 SA Introduction ID 1044 9757 Rev 2 0 Page 1 1 Introduction Chapter 1 1 P R E L I M I N A R Y...

Page 20: ...Introduction CP6003 SA Page 1 2 ID 1044 9757 Rev 2 0 P R E L I M I N A R Y This page has been intentionally left blank...

Page 21: ...ports RS 232 on front and rear I O RS 422 on rear I O and six SATA interfaces with RAID 0 1 5 10 functionality one for the onboard SATA connector one for the SATA Flash mod ule or the 2 5 HDD SSD and...

Page 22: ...igabit Ethernet interfaces on rear I O PICMG 2 16 Two Gigabit Ethernet GbE controllers One Intel 82579LM Gigabit Ethernet controller connected to one GbE port on the front panel One Intel 82580EB Quad...

Page 23: ...it The CP6003 SA comes with an optional CP6003 SA MK2 5SATA assembly kit comprised of one MMADP SATA01 module and the necessary components needed for mounting the module on the CP6003 SA The MMADP SAT...

Page 24: ...tel Core i7 i5 DDR3 DDR3 Intel QM67 USB DMI SMB SPI PCIe FDI VGA XDP FDI PCI 64 66MHz DP to HDMI DVI 2x HDMI DVI ETH 2xDP USB SATA 7 pin SATA HDA HDA Mag PCIe to PCI X DDR3 w ECC SODIMM memory Channel...

Page 25: ...s LEDs WD green Watchdog Status TH red green Temperature Status HS blue Hot Swap Control General Purpose LEDs LED 0 3 red green amber General Purpose POST code Integral Ethernet LEDs ACT green Etherne...

Page 26: ...optional J3 J2 J1 HS LED Magnetics J14 J22 J23 J24 1 2 63 1 2 63 64 1 2 PMC XMC IPMI WD TH LEDs HDD SSD 2nd gen Intel Core i7 i5 Intel QM67 GP POST Code LEDs J21 1 2 63 64 63 64 64 J18 J19 SODIMM Sock...

Page 27: ...CP6003 SA Introduction ID 1044 9757 Rev 2 0 Page 1 9 P R E L I M I N A R Y Figure 1 4 CP6003 SA Board Layout Bottom View JP2 J25 JP3 JP1 Temperature Sensor...

Page 28: ...stem memory interface with optimized support for dual channel DDR3 SDRAM memory at 1333 MHz with ECC Integrated 2D and 3D Graphics Engines DMI 2 0 with 5 GT s and FDI interfaces to the Intel QM67 chip...

Page 29: ...n the processor Support for two independent displays Supports analog displays CRT up to a resolution of 2048 x 1536 pixels with 32 bit color 75 Hz Supports digital displays HDMI DVI up to a resolution...

Page 30: ...2 0 connectors on the front panel Four USB 2 0 ports on the rear I O interface Serial Two 16C550 compatible UARTs One RS 232 port on the front panel and routed to rear I O COMA One RS 422 port on the...

Page 31: ...the front panel handle in accordance with PICMG 2 1 Rev 2 0 LEDs System LEDs System Status LEDs I0 I1 red green Indicate the software status of the IPMI controller WD green Watchdog Status TH red gree...

Page 32: ...EFI Specifi cation and the Intel Platform Innovation Framework for EFI LAN boot capability for diskless systems standard PXE Redundant image automatic fail safe recovery in case of a damaged image Non...

Page 33: ...battery manufacturer s specifications for exact range Storage 55 C to 70 C typical no discharge Climatic Humidity 93 RH at 40 C non condensing acc to IEC 60068 2 78 Dimensions 233 35 mm x 160 mm Board...

Page 34: ...rical and electronic equipment RoHS Directive 2002 95 EC Restriction of the use of certain hazardous sub stances in electrical and electronic equipment Vibration Sinusoidal IEC60068 2 6 Ruggedized ver...

Page 35: ...ron does not accept any responsibility for damage to products resulting from destructive environmental testing Table 1 3 Related Publications PRODUCT PUBLICATION CompactPCI Systems and Boards CompactP...

Page 36: ...Introduction CP6003 SA Page 1 18 ID 1044 9757 Rev 2 0 P R E L I M I N A R Y This page has been intentionally left blank...

Page 37: ...CP6003 SA Functional Description ID 1044 9757 Rev 2 0 Page 2 1 Functional Description Chapter 1 2 P R E L I M I N A R Y...

Page 38: ...Functional Description CP6003 SA Page 2 2 ID 1044 9757 Rev 2 0 P R E L I M I N A R Y This page has been intentionally left blank...

Page 39: ...l Streaming SIMD Extensions 4 1 Intel SSE4 1 Intel Streaming SIMD Extensions 4 2 Intel SSE4 2 Intel 64 Architecture Execute Disable Bit The Intel Turbo Boost Technology and the Intel Intelligent Power...

Page 40: ...5 GT s only one x4 PCI Express port is used on the CP6003 SA SATA host controller with six ports and RAID 0 1 5 10 support Two SATA 6 Gb s ports accessible via onboard connectors Four SATA 3 Gb s port...

Page 41: ...rom 125 ms to 4096 s in 16 steps Failure to trigger the Watchdog timer in time results in a system reset or an interrupt In dual stage mode a combination of both interrupt and reset if the Watchdog is...

Page 42: ...r rate sustained read rate with up to 100 MB s and sus tained write rate with up to 90 MB s It is optimized for embedded systems providing high per formance reliability and security 2 9 Trusted Platfo...

Page 43: ...board is ready for extraction The following table indicates the function of the IPMI LEDs and the Hot Swap LED Table 3 IPMI and Hot Swap LEDs Function LED COLOR NORMAL MODE OVERRIDE MODE I0 right red...

Page 44: ...tched until a cold restart of the CP6003 SA is undertaken all power off and then on again Table 2 1 Watchdog and Temperature Status LEDs Function LED COLOR FUNCTION DURING BOOT UP FUNCTION AFTER BOOT...

Page 45: ...lt setting after boot up is General Purpose Table 2 2 General Purpose LED Function LED COLOR FUNCTION DURING BOOT UP FUNCTION DURING uEFI BIOS POST if POST code config is enabled FUNCTION AFTER BOOT U...

Page 46: ...Purpose LEDs operation if the POST configuration is enabled see also Table 2 4 General Purpose LED Function Table 2 3 POST Code Sequence STATE GENERAL PURPOSE LEDs 0 All LEDs are OFF start of sequenc...

Page 47: ...s strongly recommended to use a cable below 3 metres in length for USB 2 0 devices All six ports are high speed full speed and low speed capable One USB peripheral may be connected to each port For co...

Page 48: ...Display Technology DirectX Video Acceleration DXVA support for accelerating video processing Full AVC VC1 MPEG2 HW Decode Support for DirectX10 1 DirectX10 and DirectX9 2 x HDMI DVI display interface...

Page 49: ...e VGA cable and the connected monitor have a Ground signal on pin 10 Otherwise the interface is not operable Note The VGA interface can be used both on the front panel and on the rear I O However the...

Page 50: ...r on the COM ports is up to 115 2 kbit s The following figure and table provide pinout information for the serial connector J8 COMA Note COMA can be used either on the front panel or on the rear I O I...

Page 51: ...ase T data transmission Auto Negotiation Auto wire switching for crossed cables is also supported Auto MDI X Ethernet LED Status ACT green This LED monitors network connection and activity When this L...

Page 52: ...TA connector J14 is used for standard SATA devices with cable connection All six SATA ports provide high performance RAID 0 1 5 10 functionality 2 10 7 1 Serial ATA Connector J14 The CP6003 SA provide...

Page 53: ...fined I O signals are supported on J23 Jn4 and are connected to the CompactPCI rear I O connector J4 The PCI Express to PCI X bridge detects the PCI mode PCI or PCI X and the bus speed 33 MHz 66 MHz 1...

Page 54: ...nctional Description CP6003 SA Page 2 18 ID 1044 9757 Rev 2 0 P R E L I M I N A R Y Figure 2 6 PMC Connectors J21 J22 J23 and J24 1 2 63 64 1 2 63 64 1 2 63 64 1 2 63 64 J22 Jn1 J24 Jn2 J23 Jn4 J21 Jn...

Page 55: ...D 29 AD 28 21 22 AD 27 Ground 21 22 AD 26 AD 25 23 24 Ground AD 24 23 24 3 3V Ground 25 26 C BE 3 IDSEL 25 26 AD 23 AD 22 27 28 AD 21 3 3V 27 28 AD 20 AD 19 29 30 5V AD 18 29 30 Ground V I O 31 32 AD...

Page 56: ...27 28 Rear I O AD 51 29 30 AD 50 Rear I O 29 30 Rear I O AD 49 31 32 Ground Rear I O 31 32 Rear I O Ground 33 34 AD 48 Rear I O 33 34 Rear I O AD 47 35 36 AD 46 Rear I O 35 36 Rear I O AD 45 37 38 Gro...

Page 57: ...ply for the XMC module Figure 2 7 XMC Con J20 A1 F1 A19 F19 Table 2 16 XMC Connector J20 Pinout PIN ROW A ROW B ROW C ROW D ROW E ROW F 1 PET0p0 PET0n0 3 3V PET0p1 PET0n1 VPWR 2 GND GND TRST GND GND M...

Page 58: ...talled in System Slot In a system slot the CompactPCI interface can be either a 64 bit 66 MHz PCI or PCI X inter face via a dedicated PCI Express to PCI X bridge from Pericom PI7C9X130 The CP6003 SA s...

Page 59: ...ures are required Power ramping Precharge Hot swap control and status register bits Automatic interrupt generation whenever a board is about to be removed or replaced A Hot Swap LED to indicate that t...

Page 60: ...ctPCI bus ar chitecture The CompactPCI standard is electrically identical to the PCI local bus However these systems are enhanced to operate in rugged industrial environ ments and to support multiple...

Page 61: ...9 AD 8 M66EN C BE 0 GND 20 NC AD 12 GND V I O AD 11 AD 10 GND 19 NC 3 3V AD 15 AD 14 GND AD 13 GND 18 NC SERR GND 3 3V PAR C BE 1 GND 17 NC 3 3V IPMB SCL IPMB SDA GND PERR GND 16 NC DEVSEL PCIXCAP V...

Page 62: ...6 NC V I O GND 15 NC 3 3V BDSEL GND 14 12 Key Area 11 NC GND GND 10 NC GND 3 3V GND 9 NC NC GND GND 8 NC GND V I O GND 7 NC GND GND 6 NC CPCI_Present 3 3V GND 5 NC RSV RSV RST GND GND 4 NC IPMB PWR He...

Page 63: ...6 NC RSV RSV DEG GND RSV GND 15 NC RSV GND FAL REQ5 GNT5 GND 14 NC AD 35 AD 34 AD 33 GND AD 32 GND 13 NC AD 38 GND V I O AD 37 AD 36 GND 12 NC AD 42 AD 41 AD 40 GND AD 39 GND 11 NC AD 45 GND V I O AD...

Page 64: ...2_Alert GND 18 NC RSV RSV RSV GND RSV GND 17 NC RSV GND GND 16 NC RSV RSV DEG GND RSV GND 15 NC RSV GND FAL GND 14 NC GND GND 13 NC GND V I O GND 12 NC GND GND 11 NC GND V I O GND 10 NC GND GND 9 NC G...

Page 65: ...Rear I O Connector J3 Pinout PIN Z A B C D E F 19 NC RIO_VCC RIO_VCC RIO_3 3V RIO_ 12V RIO_ 12V GND 18 NC LPa_DA LPa_DA GND LPa_DC LPa_DC GND 17 NC LPa_DB LPa_DB GND LPa_DD LPa_DD GND 16 NC LPb_DA LPb...

Page 66: ...naling USB0 to USB3 USB Port signaling SPEAKER Standard PC speaker FAN Fan speed sensoring DEBUG Debug output LPa Rear I O LAN Port A LPb Rear I O LAN Port B Note The VGA interface can be used both on...

Page 67: ...15 GND PIM 14 PIM 16 GND 20 NC GND GND GND GND GND GND 19 NC PIM 17 PIM 19 GND PIM 18 PIM 20 GND 18 NC PIM 21 PIM 23 GND PIM 22 PIM 24 GND 17 NC GND GND GND GND GND GND 16 NC PIM 25 PIM 27 GND PIM 26...

Page 68: ...I2 D1 GND 16 NC RSV HDMI2 HPDET GND RSV RSV GND 15 NC HDMI2 CLK HDMI2 CLK GND HDMI2 SDA HDMI2 SDC GND 14 NC GND GND GND GND GND GND 13 NC HDMI1 D0 HDMI1 D0 GND HDMI1 D1 HDMI1 D1 GND 12 NC HDMI1 D2 HDM...

Page 69: ...GNAL DESCRIPTION HT0 HT3 SATA Port 0 3 Signaling SMB System Management Bus Signaling HDMI1 HDMI signaling HDMI2 HDMI signaling HDA High definition audio signaling PWM Pulse width modulation output for...

Page 70: ...Functional Description CP6003 SA Page 2 34 ID 1044 9757 Rev 2 0 P R E L I M I N A R Y This page has been intentionally left blank...

Page 71: ...CP6003 SA Installation ID 1044 9757 Rev 2 0 Page 3 1 Installation Chapter 1 3 P R E L I M I N A R Y...

Page 72: ...Installation CP6003 SA Page 3 2 ID 1044 9757 Rev 2 0 P R E L I M I N A R Y This page has been intentionally left blank...

Page 73: ...such time as the board and heat sink have cooled down to room temperature Caution If your board type is not specifically qualified as being hot swap capable switch off the CompactPCI system power bef...

Page 74: ...oard until it makes contact with the backplane connectors Warning Failure to comply with the instruction above may cause damage to the board or result in improper system operation Warning Care must be...

Page 75: ...ard from the backplane by first unlocking the board ejection handles and then by pressing the handles as required until the board is disengaged 6 After disengaging the board from the backplane pull th...

Page 76: ...d is configured hardware and software wise for operation in the application To hot swap the CP6003 SA proceed as follows 1 Ensure that the safety requirements indicated in Chapter 3 1 are observed Par...

Page 77: ...SA is now complete Warning The CP6003 SA front panel cables and when installed the RIO transition module front panel cables may have power applied which comes from an external source In addition thes...

Page 78: ...The following figure shows the placement of the SATA Flash module and the MMADP SATA01 module which is required for connecting an onboard HDD SSD to the CP6003 SA Figure 3 1 Connecting a Peripheral De...

Page 79: ...re Device on a SATA channel does not spin up check power cables and cabling May also result from a bad power supply or SATA device The SATA connector on the CP6003 SA provides only a data connection T...

Page 80: ...installation or removal ensure that the safety requirements indicated in Chapter 3 1 of this user guide are observed Particular attention must be paid to the warning regarding the heat sink 3 6 1 Rea...

Page 81: ...e that the battery s operational temperature range is less than the CP6003 SA s storage temperature range For exact range information refer to the battery manufacturer s specifications Note Care must...

Page 82: ...entation for installation Note Users working with pre configured operating system installation images for Plug and Play compliant operating systems for example Windows XP Win dows XP Embedded must tak...

Page 83: ...CP6003 SA Configuration ID 1044 9757 Rev 2 0 Page 4 1 Configuration Chapter 1 4 P R E L I M I N A R Y...

Page 84: ...Configuration CP6003 SA Page 4 2 ID 1044 9757 Rev 2 0 P R E L I M I N A R Y This page has been intentionally left blank...

Page 85: ...4 1 1 DIP Switch SW1 Configuration Figure 4 1 DIP Switch SW1 The default settings of the DIP switches are indicated by using italic bold Table 4 1 DIP Switch SW1 for Boot Configuration SWITCH 1 SETTI...

Page 86: ...default settings of the DIP switches are indicated by using italic bold Table 4 2 DIP Switch SW2 for CompactPCI Interface Configuration SWITCH 1 SETTING DESCRIPTION 1 OFF PCI 33 MHz 66 MHz auto detect...

Page 87: ...ace must provide termination resistance The purpose of the jumpers JP2 and JP3 is to enable this line termination resistor 120 ohm The default setting is indicated by using italic bold The default set...

Page 88: ...STAT0 0x281 Status Register 1 STAT1 0x282 Control Register 0 CTRL0 0x283 Control Register 1 CTRL1 0x284 Device Protection Register DPROT 0x285 Reset Status Register RSTAT 0x286 Board Interrupt Configu...

Page 89: ...gisters as the system uEFI BIOS may be relying on the state of the bits under its control Table 4 7 Status Register 0 STAT0 REGISTER NAME STATUS REGISTER 0 STAT0 ADDRESS 0x280 BIT NAME DESCRIPTION RES...

Page 90: ...oltage configuration 0 3 3V VI O voltage 1 5V VI O voltage N A R 5 P66EN PMC PCI speed M66EN signal 0 33 MHz 1 66 MHz N A R 4 Res Reserved 0 R 3 CSYS CPCI system slot identification SYSEN signal 0 Ins...

Page 91: ...1 VGA disabled N A R W 5 0 Res Reserved 000000 R Table 4 10 Control Register 1 CTRL1 REGISTER NAME CONTROL REGISTER 1 CTRL1 ADDRESS 0x283 BIT NAME DESCRIPTION RESET VALUE ACCESS 7 SRST SATA Flash modu...

Page 92: ...EVICE PROTECTION REGISTER DPROT ADDRESS 0x284 BIT NAME DESCRIPTION RESET VALUE ACCESS 7 2 Res Reserved 000000 R 1 EEWP EEPROM write protection 0 EEPROM not write protected 1 EEPROM write protected Wri...

Page 93: ...IPMI controller that the next reset should not be logged 0 R W 4 Res Reserved 0 R 3 IPRS IPMI controller reset status 0 System reset not generated by IPMI 1 System reset generated by IPMI Writing a 1...

Page 94: ...gnal indicates that the power supply is beginning to derate its power output Table 4 13 Board Interrupt Configuration Register BICFG REGISTER NAME BOARD INTERRUPT CONFIGURATION REGISTER BICFG ADDRESS...

Page 95: ...Byte Register is located in the address 0x288 The Board ID Low Byte Register is located in the address 0x28D Table 4 14 Status Register 2 STAT2 REGISTER NAME STATUS REGISTER 2 STAT2 ADDRESS 0x287 BIT...

Page 96: ...lds the CompactPCI geographic address site number used to assign the In telligent Platform Management Bus IPMB address to the CP6003 SA Table 4 16 Board and PLD Revision Register BREV REGISTER NAME BO...

Page 97: ...mode the Watchdog is enabled using the required timeout period Nor mally the Watchdog is retriggered by writing a 1 to the WTR bit In the event a timeout occurs the WTE bit is set to 1 This bit can th...

Page 98: ...0 R W 4 WEN WTR Watchdog enable Watchdog trigger control bit 0 Watchdog timer not enabled Prior to the Watchdog being enabled this bit is known as WEN After the Watchdog is enabled it is known as WTR...

Page 99: ...ype identifier in the form of a hexadecimal number The Board ID Low Byte Register is located in the address 0x28D The Board ID High Byte Register is located in the address 0x288 Table 4 19 Board ID Lo...

Page 100: ...ured for Mode A the General Purpose LEDs are dedicated to functions as follows LED3 LED 3 red green red green LED2 LED 2 red green red green LED1 LED 1 red green red green LED0 LED 0 red green red gre...

Page 101: ...d 0xCA3 and configured as regular ISA interrupt Table 4 21 LED Control Register LCTRL REGISTER NAME LED CONTROL REGISTER LCTRL ADDRESS 0x291 BIT NAME DESCRIPTION RESET VALUE ACCESS 7 4 LCMD General Pu...

Page 102: ...Configuration CP6003 SA Page 4 20 ID 1044 9757 Rev 2 0 P R E L I M I N A R Y This page has been intentionally left blank...

Page 103: ...CP6003 SA Power Considerations ID 1044 9757 Rev 2 0 Page 5 1 Power Considerations Chapter 1 5 P R E L I M I N A R Y...

Page 104: ...Power Considerations CP6003 SA Page 5 2 ID 1044 9757 Rev 2 0 P R E L I M I N A R Y This page has been intentionally left blank...

Page 105: ...ed to ensure com pliance with these ratings The following table specifies the ranges for the different input power voltages within which the board is functional The CP6003 SA is not guaranteed to func...

Page 106: ...design of the CP6003 SA has been optimized for minimal power consumption the pow er supply unit shall be stable even without minimum load Where possible power supplies which support voltage sensing s...

Page 107: ...REMARKS 5 V 5 0 VDC 5 3 50 mV Main voltage 3 3 V 3 3 VDC 5 3 50 mV 12 V 12 VDC 5 5 240 mV Required 12 V 12 VDC 5 5 240 mV Not required VI O PCI voltage 3 3 VDC or 5 VDC 5 3 50 mV GND Ground not direct...

Page 108: ...was enabled CP6003 SA with Windows XP 32 bit processor and graphics controller in idle state For this measurement all processor cores and the graphics controller were in idle state no application runn...

Page 109: ...Intel Core i7 2655LE LV 2 2 GHz 12 V 0 1 W 0 1 W 0 1 W 5 V 1 6 W 1 5 W 1 3 W 3 3 V 10 0 W 10 0 W 10 0 W Total 11 7 W 11 6 W 11 4 W Table 5 6 CP6003 SA with Win XP and Max Proc Workload and Basic Graph...

Page 110: ...ard P1386 Draft 2 4a The maximum power of 7 5 W can be arbitrarily divided on the 3 3 V and 5 V voltage lines The following table indicates the current of a PMC XMC module Table 5 8 Power Consumption...

Page 111: ...CP6003 SA Thermal Considerations ID 1044 9757 Rev 2 0 Page 6 1 Thermal Considerations Chapter 1 6 P R E L I M I N A R Y...

Page 112: ...Thermal Considerations CP6003 SA Page 6 2 ID 1044 9757 Rev 2 0 P R E L I M I N A R Y This page has been intentionally left blank...

Page 113: ...g term reliability of the CP6003 SA the 2nd generation Intel Core i7 i5 processor must remain within the maximum die temperature specifications The maximum operating temperature for the processor die...

Page 114: ...or temperature reaches the TCC activation point the event is reported via an external signal to the IPMI controller Running the processor at the lower frequency and voltage will reduce power consumpti...

Page 115: ...n temperature exceeds approximately 125 C Once activated the event remains latched until the CP6003 SA undergoes a power on restart all power off and then on again This function cannot be enabled or d...

Page 116: ...One diagram per CPU version is provided There are up to two curves representing upper level working points based on dif ferent levels of average CPU utilization When operating below the corresponding...

Page 117: ...nt thermal supervision will become active protecting the CPU from thermal destruction The minimum airflow rate provid ed must be more than the value specified in the diagram Volumetric flow rate The v...

Page 118: ...ual Core i7 2655LE LV 2 2 GHz Volumetric Flow Rate CFM Airflow m s recommended operating range maximum processor workload and basic graphics operation maximum processor and graphics controller workloa...

Page 119: ...equirements to comply with operational environment conditions In most cases this will lead to a reduction in the maximum allowable ambient operating tem perature or even require active cooling of the...

Page 120: ...Thermal Considerations CP6003 SA Page 6 10 ID 1044 9757 Rev 2 0 P R E L I M I N A R Y This page has been intentionally left blank...

Page 121: ...CP6003 SA CP6003 SA MK2 5SATA ID 1044 9757 Rev 2 0 Page A 1 CP6003 SA MK2 5SATA Appendix 1 A P R E L I M I N A R Y...

Page 122: ...CP6003 SA MK2 5SATA CP6003 SA Page A 2 ID 1044 9757 Rev 2 0 P R E L I M I N A R Y This page has been intentionally left blank...

Page 123: ...A board from Kon tron and enables the user to connect an onboard 2 5 SATA HDD SSD to the CP6003 SA A 2 Technical Specifications Table A 1 MMADP SATA01 Main Specifications MMADP SATA01 SPECIFICATIONS I...

Page 124: ...I N A R Y A 3 MMADP SATA01 Module Layout The MMADP SATA01 module includes one board to board connector J1 for connection to the CP6003 SA board and one SATA connector J2 for connection to an onboard 2...

Page 125: ...round signal S2 SATA_TX Differential Transmit O S3 SATA_TX Differential Transmit O S4 GND Ground signal S5 SATA_RX Differential Receive I S6 SATA_RX Differential Receive I S7 GND Ground signal Signal...

Page 126: ...CP6003 SA MK2 5SATA CP6003 SA Page A 6 ID 1044 9757 Rev 2 0 P R E L I M I N A R Y This page has been intentionally left blank...

Page 127: ...CP6003 SA SATA Flash Module ID 1044 9757 Rev 2 0 Page B 1 SATA Flash Module Appendix 1 B P R E L I M I N A R Y...

Page 128: ...SATA Flash Module CP6003 SA Page B 2 ID 1044 9757 Rev 2 0 P R E L I M I N A R Y This page has been intentionally left blank...

Page 129: ...le B 1 SATA Flash Module Main Specifications SATA FLASH MODULE SPECIFICATIONS Interface Board to Board Connector One 34 pin male board to board connector J1 Memory Memory Up to 32 GB SLC based NAND fl...

Page 130: ...4 9757 Rev 2 0 P R E L I M I N A R Y B 2 SATA Flash Module Layout The SATA Flash module includes one board to board connector J1 for connection to the CP6003 SA Figure B 1 SATA Flash Module Layout Bot...

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