D R A F T — F O R I N
T E R N A L U S E O N L Y
43
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User Guide
CP3010-SA
3.3.2 Reset Status Register (RSTAT)
The Reset Status Register is used to determine the host’s reset source.
Note:
The Reset Status Register is set to default values by power-on (cold) reset, not by a warm
reset.
Table 27: Reset Status Register (RSTAT)
ADDRESS
0x285
BIT
7
6
5
4
3
2
1
0
NAME
PORS
Reserved
FPRS
CPRS
WTRS
ACCESS
R/W
R
R/W
R/W
R/W
RESET
N/A
0000
0
0
0
BITFIELD
DESCRIPTION
7
PORS
Power-on reset status:
0 = System reset generated by warm reset
1 = System reset generated by power-on (cold) reset
Writing a ’1’ to this bit clears the bit.
2
FPRS
Front panel push button reset status:
0 = System reset not generated by front panel reset
1 = System reset generated by front panel reset
Writing a ’1’ to this bit clears the bit.
1
CPRS
CompactPCI reset status (PRST signal):
0 = System reset not generated by CompactPCI reset input
1 = System reset generated by CompactPCI reset input
Writing a ’1’ to this bit clears the bit.
0
WTRS
Watchdog timer reset status:
0 = System reset generated by Watchdog timer
1 = System reset generated by Watchdog timer
Writing a ’1’ to this bit clears the bit.
