Configuration
CP3002
Page 4 - 8
ID 1042-9252, Rev. 2.0
P R E L I M I N A R Y
4.3.5
Device Protection Register (DPROT)
The Device Protection Register holds the write protect signals for flash devices.
Table 4-7:
Device Protection Register (DPROT)
REGISTER NAME
DEVICE PROTECTION REGISTER (DPROT)
ADDRESS
0x284
BIT
NAME
DESCRIPTION
RESET
VALUE
ACCESS
7 - 3
Res.
Reserved
00000
R
2
SFWP
SATA Flash module write protection:
0 = SATA Flash module not write protected
1 = SATA Flash module write protected
Writing a ’1’ to this bit sets the bit. If this bit is set, it cannot be
cleared.
0
R/W
1
EEWP
EEPROM write protection:
0 = EEPROM not write protected
1 = EEPROM write protected
Writing a ’1’ to this bit sets the bit. If this bit is set, it cannot be
cleared.
0
R/W
0
BFWP
SPI boot flash write protection:
0 = SPI boot flash not write protected
1 = SPI boot flash write protected
Writing a ’1’ to this bit sets the bit. If this bit is set, it cannot be
cleared.
0
R/W
