Functional Description
CP3002
Page 2 - 16
ID 1042-9252, Rev. 2.0
P R E L I M I N A R Y
2.11.8
Debug Interface
The CP3002 provides several onboard options for hardware and software debugging, such as:
•
Four bicolor general purpose LEDs (LED0..3), which indicate hardware failures, uEFI
BIOS POST codes and user-configurable outputs
•
One JTAG connector, J13, for programming the onboard logic
•
One XDP-SFF, processor JTAG connector, J14, for facilitating the debug and uEFI BIOS
software development
2.11.9
CompactPCI Interface
The CP3002 supports a flexible CompactPCI interface with a hot plug power interface (no PCI
hot swap). In the system controller slot the PCI interface is in transparent mode, and in the pe-
ripheral slot the CompactPCI interface is isolated so that it cannot communicate with the Com-
pactPCI bus. This mode is known as "passive mode".
2.11.9.1
Board Functionality when Installed in System Controller Slot
In a system controller slot, the CompactPCI interface is provided as 32-bit/33 MHz PCI inter-
face.
The CP3002 supports up to seven peripheral slots through a CompactPCI backplane.
2.11.9.2
Board Functionality when Installed in Peripheral Slot (Passive Mode)
In a peripheral slot, the board receives power but does not communicate on the CompactPCI
bus; all CompactPCI signals are isolated.
2.11.9.3
Front/Rear I/O Configuration
The CP3002 is available in two versions:
•
CP3002 front I/O version
•
CP3002 rear I/O version
Please ensure that the correct version is stated on the order. If the CP3002 is ordered with rear
I/O configuration, various I/O interfaces and signals are available via the CompactPCI connec-
tor J2, such as USB, SATA, GbE, VGA, and COM, as well as power and management signals.
If the CP3002 is ordered with front I/O configuration, the I/O interfaces and signals mentioned
above are isolated from the CompactPCI connector J2.
Note ...
The CP3002 supports universal PCI V(I/O) signaling voltages with one common
resistor configuration. For both 5V and 3.3 V PCI signaling voltages, 2.7 k
pull-
up resistors are used.
Note ...
The CP3002 with front I/O configuration does not provide a 64-bit termination to
the backplane via the CompactPCI connector J2. This is different than on previ-
ous boards such as CP307 or CP308 where 64-bit termination is provided.
