Functional Description
CP6000
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© 2005 Kontron Modular Computers GmbH
ID 27942, Rev. 05
2794
2.05.UG.VC.051020/17275
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P R E L I M I N A R Y
2.4.3
IPMI Implementation on the CP6000
This product fully supports Intelligent Platform Management Interface 1.5 and PICMG2.9 R1.0
specifications. It uses a 16-bit micro-controller (Hitachi H8/2148) to run an IPMI firmware. All
the information collected by the IPMI controller is then accessible by software through a key-
board-style Interface (see IPMI-Intelligent Platform Management Interface Specification V 1.5
for more information).
Features of the IPMI implemented on the CP6000:
• Compliant with IPMI specification 1.5, revision 1.5
• Compliant with PICMG 2.9 specification
• Firmware designed and specially made for CompactPCI implementation
• KCS SMS interface with interrupt support
• I/O address map (0xCA2 - 0xCA3 and 0xCA4 - 0xCA5)
• Dual Port IPMB configurable as two independent channels or in redundant mode
• Out of band management and monitoring using IPMB interface permits access to sen-
sors regardless of the SBC state
• Sensor threshold fully configurable
• Complete IPMI watchdog functionality
• Complete SEL, SDRR and FRU functionality
• Master Read/Write I²C support for external I²C communication devices (FRU, EEPROM,
FAN)
• BMC or PM operation mode can be configured via BIOS
• Firmware can be updated in the field
• Firmware fully customizable according to the customer needs
• Interoperable with other IPMI solution
2.4.3.1
Sensors Implemented on the CP6000
The IPMI firmware includes many sensors. The CP6000 implements several sensors, such as
sensors for voltage and pass/fail type signal monitoring. Each sensor's description is built in
the IPMI firmware and is accessible to the SMS.
The following tables indicate the signals implemented on the CP6000.
Table 2-34: Processor and Chipset Supervision
FUNCTION
DESCRIPTION
PCI reset
Status of PCI reset signal
System reset
Status of reset input to chipset
Chipset Sleep state
Status of chipset sleep state
Critical interrupt: NMI
Status of processor NMI line
Critical interrupt: SMI
Status of processor SMI line
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