2-2
Functional Description
Figure 2-1. Block Diagram of the DAS-4301/8K
DAC
(12 bit)
Channel A
Channel B
Relay
DC to
250 MHz
Amp
DAC (12
bit)
DAC
(12 bit)
A/D Converter
Offset
Vernier Gain
8K byte
FIFO
Memory
DAC
(12-bit)
−
10 V to +10 V
Threshold Trigger
Comparator (Ch B)
Trigger
Control
Trigger
Clock
Clock
Divider
100 MHz
Oscillator
Counters
Clock
Enable
Status
Data
Clock
Ref
In
ISA Bus Interface (16 bits)
ETS
Delay
RIS
Delay
Data
Data
DSP
Port
Data
−
FS to +FS
Comparator
(Ch A)
Summary of Contents for DAS-4300 Series
Page 1: ...DAS 4300 Series U S E R S G U I D E...
Page 2: ...DAS 4300 Series User s Guide Revision A June 1995 Part Number 94520...
Page 21: ...2 6 Functional Description Figure 2 2 Host Computer Memory Address Space...
Page 90: ...C 9 Figure C 16 0 125 V Input Range Gain Code 15 0 125 V Input Range Gain Code 15...