5-101
Power-up
Clears (0) all bits
*CLS
No effect
:STATus:PRESet
Clears (0) all bits
:ENABle?
Query enable register
Short-form formats:
:stat:oper:enab?
:stat:oper:trig:enab?
:stat:oper:arm:enab?
:stat:oper:arm:seq:enab?
Response message:
Decimal value (see Note)
Note: The binary equivalent of this decimal value indicates which bits in the register are set. For
example, for an acquired decimal value of 96, the binary equivalent is 0000 0000 0110 0000.
For this binary value, bits B5 and B6 are set.
These commands are used to set the contents of the event enable registers (see Figure 5-21
through Figure 5-24). An :ENABle command is sent with the decimal equivalent of the binary
value that determines the desired state (0 or 1) of each bit in the appropriate register.
Each event enable register is used as a mask for events (see [:EVENt] for descriptions of events).
When a bit in an event enable register is cleared (0), the corresponding bit in the event register
is masked and thus, cannot set the corresponding summary bit of the next register set in the sta-
tus structure. Conversely, when a bit in an event enable register is set (1), the corresponding bit
in the event register is unmasked. When the unmasked bit in the event register sets, the summary
bit of the next register set in the status structure will set.
The decimal weighting of the bits for each event enable register are included in Figure 5-21
through Figure 5-24. The sum of the decimal weights of the bits that you wish to set is sent as
the parameter (<NRf>) for the appropriate :ENABle command. For example, to set the Idle and
Set bits of the Operation Event Enable Register, send the following command:
:stat:oper:enab 1026
where;
Idle (bit B10)
=
1024
Set (bit B1)
=
2
<NRf>
=
1026
10 OUTPUT 707; “:stat:oper:enab 96; enab?”
20 ENTER 707; A$
30 PRINT A$
40 END
Line 10
Sets Bits B5 and B6 of the Operation Event Enable Register, and then queries the reg-
ister.
Line 20
Addresses the 7001 to talk.
Line 30
Displays the decimal value that defines which bits in the register are set (96).
Defaults
Query
commands
Description
Programming
example
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Summary of Contents for 7001
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