JYTEK PCIe/PXIe-6302, User Manual

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5.6.1 Start Trigger
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34
5.6.2 Reference Trigger ................................................................................ 36
5.6.3 Retrigger
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36
Learn by Example 5.6.2 and 5.6.3 ................................................................ 37
5.7 System Synchronization Interface
（
SSI
）
for PCIe Modules
.........................
39
5.8 DIP Switch in PCIe-6302 ................................................................................. 39
6.Calibration
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41
7.Using 6302 in Other Software .................................................................................. 42
7.1 Python
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42
7.2 C++
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42
8.About JYTEK
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43
8.1 JYTEK China
.....................................................................................................
43
8.2 JYTEK Korea and JYTEK in Other Countries .................................................... 43
8.3 JYTEK Hardware Products
..............................................................................
43
8.4 JYTEK Software Platform ................................................................................ 44
8.5 JYTEK Warranty and SupportServices
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44
9.Statement ................................................................................................................. 45
Figure 1 JYPEDIA Information
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2
Figure 2 TB- 68CJ terminal block.
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3
Figure 3 TB-68CJ Pin Define .................................................................................... 4
Figure 4 6302 System Block Diagram
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5
Figure 5 Themocouple connection ......................................................................... 6
Figure 6 PXIe/PCIe 6302 Front Panel
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9
Figure 7 Typical Error (30mV Input) ..................................................................... 11
Figure 8 Typical Error (65mV Input)
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11
Figure 9 Typical Noise (Level 0) ............................................................................ 12
Figure 10 Typical Noise (Level 1)
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12
Figure 11 Typical Noise (Level 2)
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13
Figure 12 Typical Noise (Level 3) .......................................................................... 13
Figure 13 Typical Noise (Level 4)
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14
Figure 14 Typical Noise (Level 5) .......................................................................... 14
Figure 15 Typical Drift (30mV Input)
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15
Figure 16 Typical Drift (60mV Input) .................................................................... 15
Figure 17 Typical channel scan sequence
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21
Figure 18 Random channel scan sequence .......................................................... 22
Figure 19 AI Continuous Raw Data Paraments
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24