XV-FA90BK/XV-FA92SL/XV-FA95GD
1-33
1
2
3
4
5
6
7
8
9
10
11
12
13
14
BIAS IN
OPIN1(+)
OPIN1(-)
OPOUT1
OPIN2(+)
OPIN2(-)
OPOUT2
GND
STBY1
PowVcc1
VO2(-)
VO2(+)
VO1(-)
VO1(+)
Input for Bias-amplifier
Non inverting input for CH1 OP-AMP
Inverting input for CH1 OP-AMP
Output for CH1 OP-AMP
Non inverting input for CH2 OP-AMP
Inverting input for CH2 OP-AMP
Output for CH2 OP-AMP
Substrate ground
Input for CH1/2/3 stand by control
Vcc for CH1/2 power block
Inverted output of CH2
Non inverted output of CH2
Inverted output of CH1
Non inverted output of CH1
I
I
I
O
I
I
O
-
I
-
O
O
O
O
Pin No.
Pin No.
Symbol
Symbol
I/O
I/O
Function
Function
15
16
17
18
19
20
21
22
23
24
25
26
27
28
VO4(+)
VO4(-)
VO3(+)
VO3(-)
PowVcc2
STBY2
GND
OPOUT3
OPIN3(-)
OPIN3(+)
OPOUT4
OPIN4(-)
OPIN4(+)
PreVcc
O
O
O
O
-
I
-
O
I
I
O
I
I
-
Non inverted output of CH4
Inverted output of CH4
Non inverted output of CH3
Inverted output of CH3
Vcc for CH3/4 power block
Input for Ch4 stand by control
Substrate ground
Output for CH3 OP-AMP
Inverting input for CH3 OP-AMP
Non inverting input for CH3 OP-AMP
Output for CH4 OP-AMP
Inverting input for CH4 OP-AMP
Non inverting input for CH4 OP-AMP
Vcc for pre block
1.Block diagram
2.Pin function
28
27
26
Vcc
25
24
23
22
10k
20k
21
20
19
18
17
16
15
STAND BY
CH4
Vcc
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
Vcc
Level Shift
Level Shift
Level Shift
Level Shift
STAND BY
CH1/2/3
10k
10k
10k
10k
10k
20k
1
2
3
4
5
6
7
8
9
10
11
12
13
14
BA5983FM-X (IC271) : 4CH DRIVER
74LCX373MTC-X(IC512,IC513)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
GND
VCC
Q7
D7
D6
Q6
Q5
D5
D4
Q4
LE
1.Pin layout
D0~D7
LE
OE
Q0~Q7
Data inputs
Latch enable input
Output enable input
3-State latch outputs
2.Pin function
Symbol
Description
LE
X
H
H
L
OE
H
L
L
L
Dn
X
L
H
X
Qn
Z
L
H
Q0
3.Truth table
INPUTS
OUTPUTS
H = HIGH Voltage level
L = LOW Voltage level
Z = High impedance
X = Immaterial
Q0 = Previous Q0 before HIGH to LOW transition of latch enable