JVC XV-BP10J, Service Manual

Page: 46 / 85

BLOCK DIAGRAMS
1. SYSTEM BLOCK DIAGRAM
256-MB
DDR-SDRA
M
256-MB
DDR-SDRA
M
CVBS
2CH. L,R
Coaxial
HDMI
Front
P
anel
BCM7601
3.3V/1.2V/
2.5V/1.8V/0.9V
For BCM7601
DDR SDRA
M
UA
RT
MICOM
(U
P
D
7
8
F
0
5
3
5
G
K
)
SA
TA
256-MB
DDR-SDRA
M
128MB(16bit)
DDR2 SDRA
M
SA
TA
Front End
IC
NA
ND
256MB
AM
P
.
THS7314
DA
C
PCM1781
AM
P
.
T
O
T
A
L
: 5
1
2
M
B
(1
2
8
M
B
: 4
E
A
)
SMPS
1
2
V
_A
U
D
IO
1
2
V
L
O
A
D
E
R
5
.3
V
A
1
3
V
A
FR
OM
S
MP
S
2
7
M
H
z
1
.8
V
/0
.9
V
3
.3
V
5
V
1
2
V
1
2
V
/5
V
_L
O
A
D
E
R
P
W
R
_C
T
R
L
TIMER
5
V
/5
.3
V
A
IR
FR
OM
F
ro
nt
P
an
el
U
S
B
+
/-
K
e
y_
R
T
N
_0
3
.3
V
USB
5
.3
V
A
3-35