(No.MA425<Rev.001>)1-13
*1 Seek stop sensitivity SSG setting
FM
AM
30 V-SW
00
FF
AA
Adjust Synchronization mode
Polarity cobtrol for the WIDEBLK input signal
Video switch
31 COMA
00
FF
A3
Adjust Common Pulse Amplitude
32 COMDC
00
FF
26
Adjust Reference DC output
33 VFRE
00
FF
00
Fix
Force Dotclk for T-Con stopping
AFC2 Phase control
Driving ability of pulse output stage
34 SINHI
00
FF
00
Fix
SECAM Inhibit
Low pass filter for Y input
Dot clock PLL
Polarity switch of video signal inverter
Polarity switch of common pulse inverter
35 PDCK
00
FF
A7
Fix
Polarity control for Compare Pulse input signal
Polarity control for VD output signal
Polarity control for HD output signal
Control the Divider for the Dot clock output signal
DOTCLK adjustment
36 PADJ
10
FF
20
Fix
VD phase phase
DOTCLK adjustment
37 VPHASE
00
07
00
Adjust VD out Phase
37 HPHASE
00
1F
11
Adjust HD out Phase
38 GM2RGB
00
FF
00
Adjust Gamma2 Gain extension for R,G,B
39 T1
00
FF
00
Fix
For IC testing at plant
40 T2
00
FF
00
Fix
For IC testing at plant
41 SID_S
00
FF
02
Fix
SECAM Gate pulse phase
SECAM ID sensitivity
SECAM ID mode
Enhance the higher side of SECAM Bell filter
PAL/NTSC ID sensitivity for digital comb filter
Select chroma BPF frequency response
ABCL SW
42 S_BLK
10
FF
88
Fix
R-Y Black level adjust for SECAM
B-Y Black level adjust for SECAM
97.9MHz or 98.1MHz
LOC: 33dBuV (min.) 43dBuV (max.) 38dBuV (normal)
400Hz (sig.) 22.5kHz (Dev.)
DX : 18dBuV (min.) 28dBuV (max.) 23dBuV (normal)
Indication
Minimum value Maximum
value
Reference
register value
Detail
999kHz or 1000kHz
24dBuV (min.) 34dBuV (max.) 29dBuV (noemal)
400Hz (Sig.) 30%
