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GO-5000M-PGE / GO-5000C-PGE
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6.2.8.1 Basic block diagram
Fig. 6 GPIO
Soft Trigger
LVAL IN
FVAL IN
Exposure Active
Frame Active
GPIO 5 (OPT IN)
Pixel Clock
Cross Point
Switch
12 bit Counter
InvEn
InvEn
InvEN
NAND
InvEN
Pulse Generator
20 bit counter x 1
CLR
Trigger 0 (Acquisition Start)
Sel Bit (5,0)
Sel Bit (7)
Sel Bit (7)
Pulse Generator 0
Trigger 1 (Acquisition Stop)
Trigger 3 (Transfer Start)
Trigger 2 (Frame Start)
GPIO 1 (OPT OUT 1)
GPIO 2 (OPT OUT 2)
Sel Bit (7)
Frame Trigger Wait
User out 0
User out 1
Action 1
Action 2
Time Stamp Reset
NAND 1
NAND 2