64
PCI and IDE Configuration
The recovery time is the length of time, mea sured in CPU clocks, which the
system will dela y a fter the completion of a n input/output request. This dela y
ta kes pla ce beca use the CPU is opera ting so much fa ster tha n the input/output bus
tha t the CPU must be dela yed to a llow for the completion of the I/O.
This item a llows you to determine the recovery time a llowed for 8 bit I/O.
Choices a re from NA, 1 to 8 CPU clocks.
1 clock is the default.
This item a llows you to determine the recovery time a llowed for 16 bit I/O.
Choices a re from NA, 1 to 4 CPU clocks.
1 clock is the default.
In order to improve performa nce, certa in spa ce in memory ca n be reserved for
ISA ca rds. This memory must be ma pped into the memory spa ce below 16 MB.
Enabled
Memory hole supported.
Disabled
Memory hole not supported.
Disabled is the default.
Peer concurrency mea ns tha t more tha n one PCI device ca n be a ctive a t a time.
Enabled
Multiple PCI devices can be active.
Disabled
Only one PCI device can be active at a time.
Enabled is the default.
Bit I/O Recovery Time
Bit I/O Recovery Time
Memory Hole At 15M-16M
Peer
Concurrency
Summary of Contents for DP6NS
Page 5: ...5 Socket 8 Socket 8 JP9 1 1 JP11 JP4 1 JP7 JP23 Figure 2 Jumpers location...
Page 8: ...8 U SCSI Socket 8 Socket 8 U SCSI Socket 8 Socket 8 Socket 8 JP1 Socket 8 JP12...
Page 21: ...21 Socket 8 Socket 8 JP9 1 1 JP11 JP4 1 JP7 JP23 Figure 3 Jumpers for DP6NS...
Page 33: ...33 U SCSI Socket 8 Socket 8 USB SIDE USB Riser Card USB...
Page 87: ...87...
