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January 24, 2005

is open prior to driving signals into the BNC connectors. An 
output level of 0dBm from the CODEC is required to provide 
full scale ringing when operating from -100V battery.

External Ringing Source

Using an external function generator at J9 provides the most 
control of the ringing waveform. The flexibility of the ringing 
interface can be fully exercised by the function generator. 

Trapezoidal Ringing

A logic level square wave, at J9, with 50% duty cycle will be 
shaped by the components R

TRAP

 and C

TRAP

 when this 

jumper position is selected. The components shipped with 
the evaluation board will result in a 75V

RMS

 trapezoidal 

ringing waveform when operating from a -100V battery.

Ring Trip Control

Three very distinct actions occur when the device detects a 
ring trip. First, the DET output is latched low. The latching 
mechanism eliminates the need for software filtering of the 
detector output. The latch is cleared when the operating 
mode is changed externally. Second, the VRS input is 
disabled, removing the ring signal from the line. Third, the 
device is internally forced to the forward active mode, 
however, low battery is not automatically selected upon ring 
trip, and must be switched manually using the BSEL toggle 
switch. 

AC Transmission Tests

Description

Tests of the AC transmission parameters of the SLIC and the 
CODEC can be performed individually, or as a complete 2W 
to PCM line circuit. Jumpers are used to complete the 
analog signal interface between the RSLIC and the CODEC 
as shown in Table 3. The RSLIC and CODEC gain equations 
and target values are contained in Section 3: AC 
Transmission Theory and Design.

Test Set-up for RSLIC and CODEC Gains

Basic tests of the RSLIC and CODEC AC gain parameters 
can be performed using a signal generator and standard AC 
voltmeters, or a complete suite of PCM4 tests can be 
performed on the RSLIC and the CODEC separately. The 
RSLIC PCM4 tests use the A-A tests. The CODEC R

X

 and 

T

gain tests use the PCM4 A-D and D-A tests.

For RSLIC gain tests, the R

X

 AC test input is connected to 

the VREC BNC (RSLIC receive input) and the 2W AC test 
output is measured at the tip-ring terminals. The RSLIC 
analog 4W transmit output is measured at the VXMIT BNC. 
A summary of RSLIC and CODEC tests is provided in Table 
8. 

The following analog input and output characteristics must 
be considered when performing AC testing. 

RSLIC analog I/O:

• Rx input impedance (VREC) is >30k

), and is AC 

coupled.

• Tip to ring AC impedance is 600

. A DC potential of up 

to 48VDC is present. AC coupling is required.

• Tx output impedance (at VXMIT) is <10

; AC coupled.

CODEC analog I/O

• Tx input (at VXMIT) is >50k

Ω,

 DC coupled.

• Rx output (at VREC) is <20

, DC coupled.

Care must be given to the proper selection of analog 
impedances on the PCM4 analog R

X

 and T

ports when 

performing PCM4 AC gain tests.

PCM4 Set-up

Analog PCM4 testing of the RSLIC parameters is performed 
using the analog I/O on the front panel. CODEC A-D and D-
A testing with the PCM4 requires the use of the digital I/O 
connections to the evaluation board as indicated in the table 
below.

Front panel cable lengths should be equal, and should be as 
short as possible to prevent delay-induced errors.

The PCM4 General Parameter settings in the following table 
should be used to configure the digital interface to the 
CODEC prior to D-A and A-D testing.

TABLE 6. PCM4 DIGITAL I/O CONNECTION

PCM4 DIGITAL PORT

EVALUATION BOARD DIGITAL 

PORT

Rx Signal

J10 - DT

Tx Signal

J11 - DR

Frame Sync

J12 - F.S.

Tx Clock

J13 - CKL

TABLE 7. PCM4 GENERAL PARAMETER SETTINGS

PCM4 GENERAL PARAMETER

SETTING

1 - DIGITAL CONFIGURATION

11, 23

2 - FRAME SELECTION

14, 24, 31

3 - DIGITAL TX INTERFACE

13, 22, 31

4 - DIGITAL RX INTERFACE

13, 22

5 - DIGITAL WORDS IN TX FRAME

11, 22

6 - TX ERROR INSERTION

11

7 - PCM ENCODING (A-law)

11, 21

8 - SCANNER PARAMETER

11, 21

9 - SPECIAL PARAMETER

11, 13, 16, 22, 23, 27, 
33, 35

Application Note 1168

Summary of Contents for ISL5585EVAL4

Page 1: ...M to 2W AC transmission circuits Theory of operation and the AC transmission design equations are included to enable the user to adapt the performance to meet his specific needs The operation of the r...

Page 2: ...pled by CRS Position 3 TRAP Connects the VRS connector J9 thru RC network to the device ringing input Path is AC coupled JP7 Selects the 5V or 3 3V chip set Hybrid Gain of the CODEC AC coupled by C1 J...

Page 3: ...header Refer to the specific RSLIC data sheet for detailed description of operating states Single Board Operation Description The stand alone configuration supports separate measurement of the RSLIC o...

Page 4: ...ow negative battery supply to the HC55185 device yellow wire 4 5V Positive 5V supply to the RSLIC LED detector output indicators green wire 7 thru 10 GND Twisted pair returns for external supply conne...

Page 5: ...ppearing at the tip and ring terminals Extra care is required when connecting external equipment to the tip and ring terminals during testing to prevent personnel injury and equipment damage Jumper Se...

Page 6: ...PCM4 tests can be performed on the RSLIC and the CODEC separately The RSLIC PCM4 tests use the A A tests The CODEC RX and TX gain tests use the PCM4 A D and D A tests For RSLIC gain tests the RX AC te...

Page 7: ...o the CODEC PCM output This signal path provides a measure of the trans hybrid balance for the line circuit with a 600 termination at Tip and Ring Digital Loop Back Configuration Description The digit...

Page 8: ...ed to J8 the output at JP4 should be 0 322Vrms The signal levels for digital loop back are independent of the clock selected by JP10 Dual board A A Configuration Description Two evaluation boards can...

Page 9: ...DEC master clock to 512kHz JP11 Enables the on board logic multiplexer JP12 Configures board as master SECONDARY POWER CABLE MASTER SLAVE FIGURE 4 FULL CHANNEL A A CONFIGURATION CONNECTORS AND JUMPERS...

Page 10: ...paths are connected differently The HC55185 G42 RX input is at Vrs and the gain is fixed at 0dB The ISL5585 however is required to compensate for the 3 3V CODEC attenuation i e lower 0dBm0 reference l...

Page 11: ...fixed conversion gain needed to restore the CODEC Absolute Voltage Reference Level to the 0dBm0 standard value of 0 775Vrms at 600 at the PCM bus The overall line circuit 2W to PCM gain is adjusted us...

Page 12: ...mponent Values Rp 51 Rs 66 5k Rin 37 4k ZO RS 133 3 G42 Rs Rin G24 ZO ZO 2RP ZL G44 Rs Rin ZL 2RP ZL 2RP ZO FIGURE A2 ISL5585 HYBRID BLOCK DIAGRAM TABLE A2 ISL5585 TRSANS HYBRID BALANCE EQUATIONS ISL5...

Page 13: ...99 G42 0dB G24 7 63dB G44 0 416 7 63dB ZO RS 133 3 G42 2 ZL ZL 2RP ZO G24 ZO ZO 2RP ZL G44 ZO ZL 2RP ZO FIGURE B2 HC55185 HYBRID BLOCK DIAGRAM TABLE B2 HC55185 TRANS HYBRID BALANCE EQUATIONS HC55185 W...

Page 14: ...C E0 1 2 JP4 CODEC 5v 3 3v 3 3v 5v 5v RIN 37 4K 1 CP 1 2 3 B1100CC TECCOR Q2 CR4 1N4935 CR5 1N4935 1 1 J7 VXMIT 1 1 J8 VREC PWR CONN 24V 72 to 100V CRX 0 4uF CODEC CFB 0 47uF 1 2 3 JP13 RP 0 Ohm 1 RS...

Page 15: ...Intersil or its subsidiaries For information regarding Intersil Corporation and its products see www intersil com January 24 2005 ISL5585EVAL4 Electrical Component List COMPONENT VALUE TOLERANCE RATI...

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