SE7221BK1
-E
Technical Product Specification
68
F2
Start reading FAT table and analyze FAT to find the clusters occupied by the recovery
file.
F3
Start reading the recovery file cluster by cluster.
F5
Disable L1 cache.
FA
Check the validity of the recovery file configuration to the current configuration of the
flash part.
FB
Make flash write enabled through chipset and OEM specific method. Detect proper
flash part. Verify that the found flash part size equals the recovery file size.
F4
The recovery file size does not equal the found flash part size.
FC
Erase the flash part.
FD
Program the flash part.
FF
The flash has been updated successfully. Make flash write disabled. Disable ATAPI
hardware. Restore CPUID value back into register. Give control to F000 ROM at
F000:FFF0h.
9.7.3.4 DIM Code Checkpoints
The Device Initialization Manager Module gets control at various times during BIOS POST to
initialize different BUSes. The following table describes the main checkpoints where the DIM
module is accessed.
Table 75. DIM Code Checkpoints
Checkpoint
Description
2A
Initialize different buses and perform the following functions: Reset, Detect, and Disable (function 0);
Static Device Initialization (function 1); Boot Output Device Initialization (function 2). Function 0
disables all device nodes, PCI devices, and PnP ISA cards. It also assigns PCI bus numbers.
Function 1 initializes all static devices that include manual configured onboard peripherals, memory
and I/O decode windows in PCI-PCI bridges, and noncompliant PCI devices. Static resources are
also reserved. Function 2 searches for and initializes any PnP, PCI, or AGP video devices.
38
Initialize different buses and perform the following functions: Boot Input Device Initialization (function
3); IPL Device Initialization (function 4); General Device Initialization (function 5). Function 3 searches
for and configures PCI input devices and detects if system has standard keyboard controller. Function
4 searches for and configures all PnP and PCI boot devices. Function 5 configures all onboard
peripherals that are set to an automatic configuration and configures all remaining PnP and PCI
devices.
9.7.3.5 ACPI Runtime Checkpoints
ACPI checkpoints are displayed when an ACPI capable operating system either enters or
leaves a sleep state. The following table describes the type of checkpoints that may occur
during ACPI sleep or wake events.
Table 76. ACPI Runtime Checkpoints
Checkpoint
Description