Intel S1200V3RP, Technical Product Specification

Page: 45 / 270

Intel® Server Board S1200V3RP TPS Functional Architecture
Revision 1.2 31
3.5.3 Baseboard Management Controller
The server board utilizes the following features of the embedded baseboard management
controller:

IPMI 2.0 Compliant

400MHz 32-bit ARM9 processor with memory management unit (MMU)

Two independent10/100/1000 Ethernet Controllers with RMII/RGMII support

DDR2/3 16-bit interface with up to 800 MHz operation

12 10-bit ADCs

Fourteen fan tachometers

Eight Pulse Width Modulators (PWM)

Chassis intrusion logic

JTAG Master

Eight I2C interfaces with master-slave and SMBus* timeout support. All interfaces are
SMBus* 2.0 compliant.

Parallel general-purpose I/O Ports (16 direct, 32 shared)

Serial general-purpose I/O Ports (80 in and 80 out)

Three UARTs

Platform Environmental Control Interface (PECI)

Six general-purpose timers

Interrupt controller

Multiple SPI flash interfaces

NAND/Memory interface

Sixteen mailbox registers for communication between the BMC and host

LPC ROM interface

BMC watchdog timer capability

SD/MMC card controller with DMA support

LED support with programmable blink rate controls on GPIOs

Port 80h snooping capability

Secondary Service Processor (SSP), which provides the HW capability of offloading time
critical processing tasks from the main ARM core.
3.5.3.1 Remote Keyboard, Video, Mouse, and Storage (KVMS) Support

USB 2.0 interface for Keyboard, Mouse, and Remote storage such as CD/DVD ROM
and USB Flash Drive

USB 1.1/USB 2.0 interface for PS2 to USB bridging, remote Keyboard and Mouse

Hardware Based Video Compression and Redirection Logic

Supports both text and Graphics redirection

Hardware assisted Video redirection using the Frame Processing Engine

Direct interface to the Integrated Graphics Controller registers and Frame buffer

Hardware-based encryption engine