Datasheet
69
Signal Description
6
Signal Description
This chapter describes the processor signals. They are arranged in functional groups
according to their associated interface or category. The following notations are used to
describe the signal type:
The signal description also includes the type of buffer used for the particular signal:
NOTES:
1.
Qualifier for a buffer type.
Notations
Signal Type
I
Input Pin
O
Output Pin
I/O
Bi-directional Input/Output Pin
Table 6-21.Signal Description Buffer Types
Signal
Description
PCI Express*
PCI Express interface signals. These signals are compatible with PCI
Express 2.0 Signalling Environment AC Specifications and are AC coupled.
The buffers are not 3.3-V tolerant. Refer to the PCIe specification.
FDI
Intel Flexible Display interface signals. These signals are compatible with
PCI Express 2.0 Signaling Environment AC Specifications, but are DC
coupled. The buffers are not 3.3-V tolerant.
DMI
Direct Media Interface signals. These signals are compatible with PCI
Express 2.0 Signaling Environment AC Specifications, but are DC coupled.
The buffers are not 3.3-V tolerant.
CMOS
CMOS buffers. 1.1-V tolerant
DDR3
DDR3 buffers: 1.5-V tolerant
A
Analog reference or output. May be used as a threshold voltage or for
buffer compensation
GTL
Gunning Transceiver Logic signaling technology
Ref
Voltage reference signal
Asynchronous
1
Signal has no timing relationship with any reference clock.
