Datasheet
17
Register Description
at DID of 2C22h. Device 4, Function 3 contains the thermal control registers for
Integrated Memory Controller Channel 0 and resides at DID of 2C23h.
• Device 5: Integrated Memory Controller Channel 1. Device 5, Function 0 contains
the control registers for Integrated Memory Controller Channel 1 and resides at
DID of 2C28h. Device 5, Function 1 contains the address registers for Integrated
Memory Controller Channel 1 and resides at DID of 2C29h. Device 5, Function 2
contains the rank registers for Integrated Memory Controller Channel 1 and resides
at DID of 2C2Ah. Device 5, Function 3 contains the thermal control registers for
Integrated Memory Controller Channel 1 and resides at DID of 2C2Bh.
• Device 6: Integrated Memory Controller Channel 2. Device 6, Function 0 contains
the control registers for Integrated Memory Controller Channel 2 and resides at
DID of 2C30h. Device 6, Function 1 contains the address registers for Integrated
Memory Controller Channel 2 and resides at DID of 2C31h. Device 6, Function 2
contains the rank registers for Integrated Memory Controller Channel 2 and resides
at DID of 2C32h. Device 6, Function 3 contains the thermal control registers for
Integrated Memory Controller Channel 2 and resides at DID of 2C33h.
2.3
Device Mapping
Each component in the processor is uniquely identified by a PCI bus address consisting
of Bus Number, Device Number, and Function Number. Device configuration is based on
the PCI Type 0 configuration conventions. All processor registers appear on the PCI bus
assigned for the processor socket. Bus number is derived by the max bus range setting
and processor socket number.
Notes:
1.
Applies only to processors supporting sparing, mirroring, and scrubbing RAS features.
Table 2-1.
Functions Specifically Handled by the Processor
Component
Register Group
DID
Device
Function
Processor
Intel QuickPath Architecture Generic Non-core Registers
2C41h
0
0
Intel QuickPath Architecture System Address Decoder
2C01h
1
Intel QPI Link 0
2C10h
2
0
Intel QPI Physical 0
2C11
1
Integrated Memory Controller Registers
2C18h
3
0
Integrated Memory Controller Target Address Decoder
2C19h
1
Integrated Memory Controller RAS Registers
2C1Ah
2
1
Integrated Memory Controller Test Registers
2C1Ch
4
Integrated Memory Controller Channel 0 Control
2C20h
4
0
Integrated Memory Controller Channel 0 Address
2C21h
1
Integrated Memory Controller Channel 0 Rank
2C22h
2
Integrated Memory Controller Channel 0 Thermal Control
2C23h
3
Integrated Memory Controller Channel 1 Control
2C28h
5
0
Integrated Memory Controller Channel 1 Address
2C29h
1
Integrated Memory Controller Channel 1 Rank
2C2Ah
2
Integrated Memory Controller Channel 1 Thermal Control
2C2Bh
3
Integrated Memory Controller Channel 2 Control
2C30h
6
0
Integrated Memory Controller Channel 2 Address
2C31h
1
Integrated Memory Controller Channel 2 Rank
2C32h
2
Integrated Memory Controller Channel 2 Thermal Control
2C33h
3
Summary of Contents for I7-900 DEKSTOP SPECIFICATION
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