Errata
Specification Update
21
AA14.
Access to an Unsupported Address Range in Uniprocessor (UP) or
Dual-processor (DP) Systems Supporting Intel
®
Virtualization
Technology May Not Trigger Appropriate Actions
Problem:
When using processors supporting Intel
®
Virtualization Technology and
configured as dual- or single-processor-capable (i.e. not multiprocessor-
capable), the processor should perform address checks using a maximum
physical address width of 36. Instead, these processors will perform address
checks using a maximum physical address width of 40.
Implication:
Due to this erratum, actions which are normally taken upon detection of an
unsupported address may not occur. Software which does not attempt to
access unsupported addresses will not experience this erratum.
Workaround:
None identified.
Status:
For the steppings affected, see the
Summary Tables of Changes.
AA15.
VM Exit Due to a MOV from CR8 May Cause an Unexpected Memory
Access
Problem:
In a system supporting Intel
®
Virtualization Technology and Intel
®
Extended
Memory 64 Technology, if the "CR8-store exiting" bit in the processor-based
VM-execution control field is set and the "use TPR shadow" bit is not set, a
MOV from CR8 instruction executed by a Virtual Machine Extensions (VMX)
guest that causes a VM exit may generate an unexpected memory access.
Implication:
When this erratum occurs, a read access to unexpected address may be
issued to the chipset. Subsequent side effects are dependent on chipset
operation and may include system hang.
Workaround:
It is possible for the BIOS to contain a workaround for this erratum.
Status:
For the steppings affected, see the
Summary Tables of Changes.
AA16.
The Processor May Incorrectly Respond to Machine Checks during VM
Entry/Exit Transitions
Problem:
In systems supporting Intel
®
Virtualization Technology, when machine checks
are encountered during VM entry/exit transitions, the processor is expected
to respond with a VM exit (if a machine check occurs during VM entry) or
abort (if a machine check occurs during VM exit). As a result of this erratum
when machine checks occur during VM entry/exit transitions the processor
will attempt to service the machine check which may lead to IERR-shutdown
or execution of the Machine Check handler, dependent on the CR4.MCE
setting.
Implication:
The system may end up in the shutdown state if CR4.MCE is not set.
Workaround:
None identified.
Status:
For the steppings affected, see the
Summary Tables of Changes.
