Intel 82801EB, Programmer'S Reference Manual

Page: 48 / 59

Theory of Operation
R
48 SATA Programmer’s Reference Manual
// or
// P-ATA == primary master/slave
// Port 0 == secondary slave
// Port 1 == secondary master
//
OperationRegion(IDEC,PCI_Config,0x90,3)
Field(IDEC,ByteAcc,NoLock,Preserve)
{
MAP, 8, // SATA Map register - Offset 90h
, 8, // Skip 8 bits
PCS, 8 // SATA Port status and control register
}
Device( IDE1) { // SATA controller
Name(_ADR, 0x01f0002) // Device 31, Function 2
//
// EPRT – Enable the SATA ports. This assumes the controller is in combined
// mode. This would be need to modified to handle non-combined modes.
// Entry:
// arg0 bit map indicating which port(s) to enable:
// bit 0 set, enable Port 0
// bit 1 set, enable Port 1
// all other bits must be zero
//
//
// Since the ports operate independently, we can enable both simultaneously
//
Method( EPRT, 1) {
Store( 1, Local0) // Set max attempts
Store( Arg0, Local1)
While( LNotEqual( Local0, 0)){
Or( Arg0, PCS, PCS) // enable Port(s)
Sleep( 500) // Wait 500ms. Some devices respond
// very quickly, some longer. This loop will
// account for worse case. This is an
// example and could be better optimized
Decrement( Local0) // account for this attempt
Store( PCS, Local2) // fetch port presence bits
// Check if we are enabling Port 0
If( LAnd( Arg0, 0x01) {
If( LAnd( Local2, 0x10)) {
Decrement( Local1) // Port 0 is enabled
}
Else {