Intel 82801EB, Programmer'S Reference Manual

Page: 37 / 59

Theory of Operation
R
SATA Programmer’s Reference Manual 37
//
… // power plane control is platform specific
// Must wait 30ms before we can enable the ports
Sleep( 30)
EPRT( 0x03) // enable the ports, assumes combined mode
//
//
Check ports and disable device power plane if port(s) not enabled.
//
… // power plane control is platform specific
}
//
// Handle transitions to D3 power state
//
Method(_PS3,0)
{
//
// Disable the ports. Since a non-SATA aware driver could be in use,
// we need to disable the SATA ports here
//
// Since enhance mode implements a master-master scheme, only 1 port
// would be disabled here (dependent on the MAP settings). In Combined
// mode, both SATA ports are viewed as a single logical channel
// implementing a master-slave configuration in which case both ports
// are disabled.
//
Store( Zero, PCS) // disable ports 0 and 1 – assume combined mode.
//
// Disable Power to the device - Set the GPIO bit corresponding to the
// power plane control, platform specific
//
…
}
}
} // Device( IDE1)
A.3 Device Presence Check – Using I/O
//
// This sample code illustrates how system software could directly read the port
// presence (PxP) bits to determine the connect status of the SATA ports.
//
// Note: This sample code does not apply to any specific operating system. As
// such, the function, OS_ReadPCI() is a hypothetical, OS provided function that
// allows a device’s PCI configuration space to be read.