NV10 Operations Manual – GA333-3
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© Copyright Innovative Technology Limited 2005
6
.
2:Input and Output Hardware Circuits
Caution:
The output low signal is affected by the value of the pull up resistor on the host machine
interface. Ensure your signal LOW levels comply with the 74HC CMOS series specification
for reliable operation, (see figure 4).
Figure 4 - Input and Output Circuit
•
All outputs are open collector transistors.
•
All Inputs are held high to in5v via 10K
Ω
. The input structure is a CMOS gate with
anti static protection fitted.
Interface Logic levels
Logic Low
Logic High
Inputs
0V < Low < 0.5
+3.7V < High <12V
Outputs with 2K2
Ω
pull
up
0.6V
Pull up voltage of host interface
Maximum Current Sink
50mA per output
Table 4- Interface Logic Levels
6.3: Software Optional Serial Interface Input and Outputs
Caution:
The serial interfaces will only work if the relevant interface software is correctly installed.
Name
Description
SSP TxD
Vend 1
SSP RxD
Inhibit 1
Table 5 - Software Optional Serial Interface Inputs and Outputs
