Application Note
page 12 of 33
V1.7
2022-08-01
XENSIV™ BGT60LTR11AIP shield
60 GHz radar system platform
Hardware description
The shield contains two Hirose DF40C-20DP-0.4V connectors, P1 and P2. The corresponding DF40C-20DS-0.4V
connectors are on the Radar Baseboard MCU7. Figure 12 illustrates the pin-out of the Hirose connectors of the
BGT60LTR11AIP shield.
The signal IRQ is connected with a R5 resistor (0
Ω) to the divider output (BGT_DIV) of the MMIC. In
SPI pulsed
mode, BGT_DIV generates a signal that acts as an interrupt signal for the MCU to start ADC acquisition. BGT_DIV
could also be used to measure divider frequency.
Bottom view
Sensor connectors (P1 and P2)
Castellated holes
Figure 12
Connectors on the BGT60LTR11AIP shield, and their pin-outs
3.7
EEPROM
The BGT60LTR11AIP shield contains an EEPROM connected via an I
2
C interface to store data like a board
identifier. Its connections can be seen in Figure 13. This EEPROM contains a descriptor indicating the type of the
shield board and MMIC. This is used by the firmware to communicate properly with the shield.
Figure 13
Connections of the EEPROM
3V3digital
1
2
D3
Yellow LED 0201
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
2
1
2
1
2
2
2
2
2
3
2
3
2
4
2
4
P1
DF40C-20DP-0.4V
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
2
1
2
1
2
2
2
2
2
3
2
3
2
4
2
4
P2
DF40C-20DP-0.4V
R17
1k
OpenDrain_LED
GND
3V3digital1
I2C_SDA
I2C_SCL
IFI
IRQ
GND
IFQ
BGT_SCK_1.5_A
1V5Sensor
BGT_PHASE_DET
BGT_MOSI_1.5_A
1V5Sensor
1V8Sensor
VDD_RF
BGT_MISO_1.5_A
BGT_TARGET_DET
1V8Sensor
BGT_RTSN_1.5_A
GND
1V8Sensor
BGT_SELECT_1.5_A
3V3Sensor
GND
3V3digital
3V3Sensor
GND
GND
BGT_DIV
IRQ
R5
0R
1
2
P3
Header 2
1
2
P4
Header 2
3V3
GND
Target_Det_Out
Phase_Det_Out
1
2
P3
Header 2
1
2
P4
Header 2
3V3
GND
Target_Det_Out
Phase_Det_Out
VCC
A1
SCL
B1
VSS
A2
SDA
B2
U3
24CW1280T-I/CS0668
GND
3V3digital1
I2C_SDA
I2C_SCL
3V3digital1
R11
2k2
R12
2k2
