Application Note
46 of 63
V 1.2
2018-12-12
5 Output PMIC Controller/ IRPS5401
User guide with DB295 and DB296 demo boards
11
General Design Recommendations and Advisements
Jitter prevention:
Actual designs are likely not matching the tight layout of the evaluation boards. To prevent noise from
entering the EA it is recommended to have a 0402 capacitor footprint located directly at the FB to GND of
each respective regulation loop (for SWA it is FB to RTN). Values between 0.1uF and 2.2uF will deliver best
results dependent on the board design.
Ground routing:
a.
If having more than one IRPS5401 in the system ensure that each IRPS5401 has its own AGND only for
the components associated with the particular IC.
b.
AGND has to be connected at a single point to GND (ideally directly at the pin). If a 0 Ohm resistor is
being used for the purpose of net separation, position it close to the pin.
c.
Keep AGND small. There are only a few components tied to it (decoupling of VCC, MTP, ADDR and the
resistors for ADDR and MTP).
