Design guide IDP2303(A)
Tips on PCB layout
Application Note
41
Revision 2.0
2017-05-03
(recommended value 1 nF) and HBFB pin (recommended value 4.7 nF) shall be mounted as close as possible
to the controller IC, while their ground shall be connected to the IC ground directly. All these connection
traces shall be as short as possible.
An optional 10~47 nF high frequency and high voltage bypass capacitor is recommended to be mounted in
parallel with the PFC bulk capacitor, close to the PFC MOSFET and PFC diode, to suppress EMI.
An optional 10~100 nF high frequency and high voltage decoupling capacitor is recommended to be
mounted between the LLC high side MOSFET drain and low side MOSFET source pin, to reduce the HF ripple
and improve EMI behavior.
6.3
PFC ZCD signal detection circuit
A separate PCB trace is recommended to be used from the ground terminal of the PFC choke auxiliary
winding to the IC GND as shown in Figure 28.
Another separate PCB trace is needed from the PFC choke auxiliary winding to the PFC ZCD sensing resistors
R_zcd_h and R_zcd_l. Both resistors and clamping diodes shall be mounted close to the PFC ZCD pin and IC
GND pin. This trace shall be kept far away from the LLC high side driver circuit, including the high side GND
pin, to avoid high dv/dt coupling.
The two PCB traces from the PFC choke auxiliary winding shall be parallel and close to each other.
IC
GD0
ZCD
GND
PFC choke
auxiliary winding
R_zcd_h
R_zcd_l
Figure 28
PFC ZCD signal detection circuit
6.4
HBFB voltage detection circuit
The two PCB traces from the opto-coupler to the HBFB pin and IC GND shall be parallel and close to each
other.
The HBFB pin filtering capacitor shall be mounted close to HBFB and the GND pin. The loop area between
the HBFB pin and opto-coupler shall be as small as possible. The PCB traces from the opto-coupler shall be
kept far from other PCB tracks that carry switching current. Alternatively, a separate GND trace can be
added to shield the HBFB pin signal. The two PCB traces from the opto-coupler shall be kept away from the
LLC high side driver circuit, including the high side GND pin, to avoid high dv/dt coupling.
6.5
LLC high side bootstrap circuit
As the IDP230x HSVCC, HSGD and HSGND pins can see high voltage and high dv/dt, switching noise may be
coupled to low voltage pins/traces through stray capacitance. Thus, the PCB traces and components
connected to these pins need to be kept away from other low voltage pins/traces.
