
Application Note
6 of 23
V 1.1
2020-11-09
CoolGaN™ 600 V half-bridge evaluation platform featuring GaN
EiceDRIVER™
Circuit description
The TNEG pins of U1 and U2 are connected to timing resistors R13 and R23 respectively. These resistors
program the duration of the negative off voltage as explained in section 3.7 of the
. If you
adjust the deadtime to longer than 100 ns, then R13 and R23 should be proportionally increased to ensure that
the negative gate voltage duration t
neg
is always longer than the programmed deadtime. C18 and C28 are for an
earlier version of the driver IC and are not required, so are not populated on the PCB.
The 5 V input power (VDDI) to the two gate driver ICs is bypassed with a 22 nF high-frequency bypass capacitor
(Cx2), along with a 470 Ω resistor. This is per the recommendation in the gate driver datasheet to properly bias
the built-in 3.3 V shunt regulator.
Note:
If the PWM frequency is expected to exceed 1 MHz, then R12 and R22 should be reduced from 470
Ω
to 390
Ω
. Otherwise there may not be sufficient current to maintain 3.3 V regulator bias.
3.2
Isolated gate driver power supply
Power for the gate drivers is provided by a simple isolated DC-DC converter shown in
. It takes the +5 V
input and provides two isolated 8 V outputs (VDD1-VSS1, and VDD2-VSS2). A small transformer T1 provides low-
capacitance isolation and voltage scaling. The primary of T1 is driven by U31, a MAX256 isolated power supply
driver. It provides 50 percent duty-cycle PWM, current-limited, balanced voltage to the transformer at about
500 kHz. The secondary sides are both voltage doublers consisting of Dx2, Dx3, Cx5, and Cx6. The voltage
doublers are used instead of straight rectifiers because this reduces the transformer turns ratio, thus providing
lower leakage inductance for better load regulation. A small green LED Dx4 provides a visible indication that
both high and low-side bias supplies are functioning.
Figure 5
Isolated gate driver power supply
3.2.1
Gate driver power supply transformer
The transformer used in the gate driver power supply is specifically designed to operate with the driver IC U31
(in
) at 500 kHz, with the appropriate turns ratio to provide the twin isolated 8 V outputs with the
doubler circuit. Moreover, the winding arrangement balances low inter-winding capacitance with good
coupling (low leakage inductance) and >1000 V isolation. The low capacitance (<2 pF) is important for
minimizing common-mode current injection due to fast switching transients, and the low leakage helps with
open-loop output voltage regulation.