82V3911 WAN PLL
REVISION 1 1/30/15
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EVALUATION BOARD USER’S GUIDE
2.8.2
FRAME AND MULTI-FRAME CONFIGURATION
Click on “SYNC” or select “Window > Output Frame Sync”. The Frame
and Multi-Frame configuration dialog box pops up as shown in
Figure-32
.
Figure-32 Frame/Multi-Frame Configuration Dialog Box
checked: 2 kHz/4 kHz/8 kHz
register address and bits
input clock inverted
FRSYNC_8K output configuration
MFRSYNC_2K output configuration
click to read the registers
listed in this dialog box
click to exit this dialog box
FRSYNC_8K & MFRSYNC_2K
output pulse position configuration