ICS PCI-WDT 500, Product Manual

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Manual Number: 00650-144-1 Page 17
Note : An alternative use of the reset signal is to simply notify an external device that a reset is
necessary.
Foreground Watchdog Mode
In order to prevent the reset, the software program must periodically reload counter 1 with the
initial load value (or any other suitable load value). The maximum delay between counter 1 reloads
is determined by the load values of the concatenated counters minus a suitable fudge factor.
Note : It is not necessary to reload counter 0 because it will simply recycle. Also note that loading
counter 0 with full-scale is customary, as exact timing is rarely a requirement of a watch-
dog function.
Counter 0 must be programmed for mode 3. Counter 1 must be programmed for mode 2. The PCI-
WDT50x was designed specifically for these modes. Any other modes may cause unpredictable
behavior. See Appendix A for details on how to program the counters.
In summary:
Disable Watchdog Read BASE+7
Program CTR0 for Mode 3 See Appendix A
Program CTR1 for Mode 2 See Appendix A
Load CTR0,1 with reset delay See Appendix A
Enable Watchdog Write BASE+7
Then, before the first timeout occurs:
Enter main loop
Program CTR1 (again) for Mode 2
Load CTR1
See Appendix A
User code goes here
Repeat main program loop
Background Watchdog Mode
An alternative method to refresh the counters that provides some flexibility “but potentially re-
duces dependability” is to use an interrupt service routine (ISR). PCI-WDT50x will generate an
interrupt one counter 0 load value before timeout occurs. If that interrupt is used by a user-defined
ISR, it’s possible for that ISR to refresh the counters and, thus, avoid need for the main program
loop to refresh the counters.
There is the possibility of reduced dependability because this method will not detect certain types
of program lock-ups. For example, if the application program were to lock up in a loop such as
“JMP $”, the interrupt service routine would never know it and would therefore continue refreshes