Manual Number: 00650-014-4
Page 8-4
AD12-8 Manual
Reading and Loading the Counters
If you attempt to read an active counter, you will most likely get erroneous data. This is partly
caused by carries rippling through the counter during the read operation. Also, the low and high
bytes are read sequentially rather than simultaneously and, thus, it is possible that carries will be
propagated from the low to the high byte during the read cycle. To circumvent these problems, you
should perform a counter-latch operation in advance of the read cycle. To do this, load the RW1
and RW2 bits with zeroes. This instantly latches the count of the selected counter(selected via the
SC1 and SC0 bits) in a 16-bit hold register. A subsequent read operation on the selected counter
returns the held value. Latching is the best way to read an active counter without disturbing the
counting process. You can only rely on directly read counter data if the counting process is sus-
pended while reading, by bringing the gate low, or by halting the input pulses.
For each counter you must specify in advance the type of read or write operation that you intend to
perform. You have a choice of loading/reading (a) the high byte of the count, or (b) the low byte of
the count, or (c) the low byte followed by the high byte.
Programming Examples
Using Counter #0 as a Pulse Counter
Note that the counters are down counters so, when resetting them, its better to load them with a
full count value of 65,535 rather than zero.
outportb(BASEA 7,0x30);
/* counter 0, mode 0 */
outportb(BASEA 4,0xff);
/* counter 0 low load byte */
outportb(BASEA 4,0xff);
/* counter 0 high load byte */
Reading Counter #0
outportb(BASEA 7,0x30);
/* counter 0, latch command */
/* read in both bytes of the latched value and combine into an integer */
value = inportb(BASEA 4) + (inportb(BASEA 4) * 256;
Programming Examples Using the A12DRV Driver
In practice, TASKS 14 and 15 of the A12DRV driver can be used to perform equivalent operations
to the above examples with fewer programming steps.
For counting pulses, the counter configuration is not of great importance because you will only be
using the countdown capabilities of the counter. Mode 2 is as good as any other choice for pulse
counting. As in the previous example, load Counter #0 with a full scale count of 65,535 (hex
FFFF) using TASK 14 of the driver. While loading the counter, counting can be inhibited by
holding the gate input, pin 21, low.
