C - 3 - 2
1st mixer
1st LO:
PA
7667.5–7842.5 MHz
BPF
DUPLEXER
1st IF:
2332.5 MHz
2nd IF:
525.75 MHz
10 GHz MODULE
IF UNIT
FI202
FI203
BPF
Q209
IC11
LVDS
IC
ID-RP2C
FPGA
IC
IF
CONVERTER
IC201
IC204
I/Q
MODULATOR
D/A
IC513
BPF
BPF
LPF
ATT
10.000–10.025 GHz
10.015–10.175 GHz
AMP
AMP
AMP
AMP
AMP
AMP
AMP
3-2 TRANSMITTER CIRCUITS
3-2-1 FPGA CIRCUIT (IF UNIT)
The TX data signal (10 Mbps) from the connected repeater
controller (ID-RP2C) is applied to the RX LVDS controller
(IC513) via [DATA A] that is connected to J2. The TX data
signals are convert differential signals to I/O signals at the
RX LVDS controller (IC513). The converted signals from the
RX LVDS controller (IC513, pin 3) is applied to the baseband
section of the FPGA IC (IC11, pin 27) and then applied to
the D/A converters (R18–R39 for I signals, R41–R62 for Q
signals) and I/Q fi lters (L10–L15, C29, C31, C32, C34, C35
for I signals, L17–L21, C37, C39, C40, C42, C43 for Q sig-
nals) to convert to I/Q baseband signals.
The converted I/Q baseband signals are applied to the I/Q
modulation circuit.
3-2-2 MODULATION CIRCUIT (IF UNIT)
The modulation circuit modulates the VCO oscillating signal
using the I/Q baseband signals.
The I/Q baseband signals are applied to the I/Q modulator
section of the I/Q modulator (IC201, pin 34 for I signal, pin
31 for Q signal) and then modulates the 3rd LO signal com-
ing from the TX 3rd VCO circuit (Q201, Q202, D201) via the
tripler circuit (Q203). The modulated signals (2nd IF signals)
are output from pins 8 and 9 (IC201) via the level adjust sec-
tion.
The 2nd IF signals are amplifi ed at Q209 and are then ap-
plied to the mixer section of the IF converter IC (IC204, pins
47, 50). The applied signals are mixed with the 2nd LO sig-
nal coming from the TX 2nd VCO circuit (Q204, Q205, D203)
via the tripler circuit (Q206) to convert to a 2332.5 MHz 1st
IF signal. The 1st IF signal is output from pin 34 (IC204) and
then passed through the bandpass fi lter (FI202). The fi ltered
signal is applied to the level adjust section of the IF convert-
er (IC204, pin 19) and then output from pin 13 (IC204).
The level adjusted signal is passed through the bandpass
fi lter (FI203) to suppress unwanted signals and then applied
to the 10 GHz module via J201.
3-2-3 RF CIRCUIT (10 GHz MODULE)
The RF circuit converts the 1st IF signal to the RF signal and
amplifi es output power level.
The 2332.5 MHz 1st IF signal from the IF unit is passed
through the bandpass, low-pass fi lters and attenuator, and
then mixed with the 1st LO signal coming from the TX VCO
circuit in the 10 GHz module to convert to the RF signal. The
RF signal is amplifi ed at 2 driver and 5 power amplifi ers to
produce 2 W output power.
The power amplified signal is applied to the antenna con-
nector via the duplexer unit.
3-3 PLL CIRCUITS
3-3-1 PLL CIRCUITS (IF UNIT)
The PLL circuit provides stable oscillation of the RX 2nd LO,
RX 3rd LO, TX 2nd LO and TX 3rd LO frequencies.
3-3-2 RX 2ND PLL CIRCUIT (IF UNIT)
The RX 2nd PLL circuit oscillates the RX 2nd LO frequency,
and the signal is applied to the 2nd mixer section in the IF
converter IC (IC404).
The oscillated signal from the RX 2nd VCO (Q404, Q405,
D402) is applied to the doubler circuit (Q406) and is then
applied to the 2nd mixer section in the IF converter IC
(IC404, pin 40).
• RF AND IF CIRCUITS (TRANSMITTER)
