IBM p5 550, Technical Overview And Introduction

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IBM System p5 550 and 550Q Technical Overview and Introduction
2.3.3 Memory throughput
The memory subsystem throughput is based on the speed of the memory. An elastic
interface, contained in the processor, buffers reads and writes to and from
memory and the processor. There are two Synchronous Memory Interface (SMI-II) chips,
each with a single 8-byte read and 2-byte write high speed Elastic Interface-II bus to the
memory controller. The bus allows double reads or writes per clock cycle. Because the bus
operates at 1056 MHz, the peak processor-to-memory throughput for read is (8 x 2 x 1056) =
16896 MBps or 16.89 GBps. The peak processor-to-memory throughput for write is
(2 x 2 x 1056) = 42264 MBps or 4.22 GBps, making a total of 21.12 GBps per processor card.
The 533 MHz DDR2 memory DIMMS operate at 528 MHz through four 8-byte paths. A pair of
DIMMs share one path. Read and write operations also share these paths. There must be at
least four DIMMs installed to effectively use each path. In this case, the throughput between
the SMI-II and the DIMMs is (8 x 4 x 528) or 16.89 GBps.
2.4 I/O buses
This section provides additional information that is related to the internal RIO-2 buses and
GX+ buses.
The QCM or DCM provides a GX+ bus. In the past, the 6XX bus was the front end from the
processor to memory, PCI Host bridge, cache, and other devices. The follow-on of the 6XX
bus is the GX bus, connecting the processor to the I/O subsystems. Compared with the 6XX,
the GX+ bus is both wider and faster and connects to the Enhanced I/O Controller.
The Enhanced I/O Controller is a GX+ to PCI/PCI-X 2.0 host bridge chip. It contains a GX+
passthru port and four PCI-X 2.0 buses. The GX+ passthru port allows other GX+ bus hubs to
be connected into the system. Each Enhanced I/O Controller can provide four separate PCI-X
2.0 buses. Each PCI-X 2.0 bus is 64 bits in width and individually capable of running either
PCI, PCI-X, or PCI-X 2.0 (DDR only).
The QCM or DCM populating the first processor slot is connected to the Enhanced I/O
Controller. The p5-550 or p5-550Q system does not have RIO-2 ports integrated on the
system planar to connect supported external I/O subsystems, so one Remote I/O expansion
card (FC 1806) is required to allow the connection. As shown in Figure 2-8 on page 33, when
this card is present, the Enhanced I/O Controller provides a dedicated GX+ bus routed to the
external RIO-2 ports. When the second Remote I/O expansion card is present, the GX+ bus,
routed to the external RIO-2 ports of the second Remote I/O expansion card, is activated if
the second processor slot is populated.