HP 85662A, Troubleshooting And Repair Manual

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Control information for A4 IF-Video assembly is transmitted over the Instrument Bus from
the Al5 Controller and decoded by the IF Control.
Address Decoder
The Address Decoder monitors ADR O-4 and activates the input latches for addresses 20 and
21 when control line LTIO goes low. Address 20 activates input latches
U14, and U17
(U6, and in early versions of Address 21 activates input latches U7, U18, and
(U3, and in early versions of Table 7 of the troubleshooting information
shows the line levels of the ADR control lines for addresses 20 and 21.
Input Latches
Input latches hold the IOB levels present at the input of the latch when the address decoder
activates the input latch. Six input latches are activated (clocked) by 2 control lines (Address
20 and Address 21) from the Address Decoder For example, when Address 20 goes high,
input latches U14, and U17 (U6, U8, and in early versions of are activated.
The levels of all sixteen IOB lines, IOBO through IOB15, are held at those same levels at the
outputs of
U14, and U17.
to A15.9 Control
The to A15.9 Control circuitry provides attenuation control voltages for the
Step Gain. Up to 14 of attenuation is accomplished by switching on discrete attenuation
steps on the Step Gain via the and control switching lines. The
smaller attenuation steps (0.1 through 1.9 are accomplished by controlling the amount
of dc current through a PIN diode attenuator on One of the outputs of goes low
when a particular step of attenuation is selected. The output of also goes low when an
odd step of attenuation is desired (0.1 0.3 1.5 and so forth). The fixed resistors
tied to edge- connector pin determine the of current through (and hence the
attenuation of) the PIN diode attenuator. The operation of the attenuator is described in
IF Gain Control
The IF Gain Control interfaces with Step Gain, the Log Amplifiers in and
Video Processor. Table 5 shows the conditions under which the steps are used.
Bandwidth Control
Bandwidths from 3 MHz to 100 (BW
These bandwidths are produced in the 21.4 MHz IF by four parallel tank circuits (two in
Bandwidth Filter and two on Attenuator-Bandwidth Filter). Their Q (which
determines bandwidth) is controlled by PIN diodes used as variable resistors. The resistance
of these PIN diodes is determined by the average current through them, which is generated
by
Either R60, R61, or R62 is switched in by U2, depending on which bandwidth had
been selected. These potentiometers (3 MHz, 1 MHz, and 300 determine the amount of
current sunk by which in turn determines the bandwidth. If no current is sunk by
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