Fast Sweep Control
The Fast Sweep Control contains circuitry for end of sweep detection and controls fast sweep
dead time, and fast sweep triggering.
End of Sweep Detection
When the sweep ramp reaches about
V, conducts and turns Q4 on. When the
collector of Q4 goes low,
pin 5 produces a
whose length is the dead time.
and
are cleared when
pin 5 goes low, and timing capacitors C4 and C5 are
discharged by the Discharge Switch in the Fast Sweep Generator. Voltage divider
and
R20 set the level at which Q5 senses the end of the sweep ramp. (Note that the fast sweep
ramp ends beyond the right-hand edge of the CRT.) The LRTRC line from
pin 5, which
is high during the sweep, supplies the retrace blanking signal to
Intensity Control.
Fast Sweep Dead Time
Multivibrator
controls the sweep dead time.
is triggered at the end of the fast
sweep ramp and holds
and
cleared for a time that is determined by C7, R24, and
R25. This prevents the triggering of further ramps for the length of the pulse from
pin
5. The length of the dead time is about 15 for sweep times from 1 through 100 and
about 120 for sweep times from 200 through 10 ms. The ST 100
(from U6 pin 12 in
the Fast Sweep Time Control circuit) controls the length of the sweep dead time by switching
the
timing resistors with transistor switch Q3. In sweep times of 10 ms through 200
Q3 is off and the dead time, set by C7 and R24, is 120 In sweep times of 100 through
1
Q3 is on, placing R25 in parallel with R24 to decrease the dead time to 15
C6 and
R23 supply additional base drive to Q4 at the end of the sweep to insure triggering of
Fast Sweep Triggering
Flip-flops
and
control the state of the fast sweep generator.
controls the
Discharge Switch through
At the end of a fast sweep, both
and
are held cleared by the dead time circuit
and
Following the dead time,
a trigger from U16 pin 5 causes
pin 7 to go low. This causes
pin 5 to go high,
which turns off the Discharge Switch and starts a sweep ramp. This can occur only if FS EN
is high. If FS EN is low, the J and K inputs of
are held low and a trigger
not set
Fast Sweep Multiplexing
In Fast Sweep mode, the X output of
Line Generator and the fast sweep ramp must
be multiplexed to
X Deflection Amplifier or
XYZ Driver Amplifier to produce a
display consisting of the graticule and characters with the fast sweep ramp and the analog
video signal. The video
from
Video Processor is multiplexed to
Y
Deflection Amplifier or
XYZ Driver Amplifier when the fast sweep ramp is multiplexed
to
or
The X and Y multiplexers are located in
Intensity Control.
In Fast Sweep mode, the output from
is applied to the CRT deflection amplifiers
following the completion of at least one fast sweep ramp.
5
Summary of Contents for 85662A
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Page 452: ...A4A6A2 Output Driver Component Locations 85662 60170 Option 067 Tab ...
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Page 473: ...Table 4 Video Bandwidth Truth Table Option H96 3 ...
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Page 594: ...HEWLETT PACKARD HP Part No 85662 90085 Printed in USA ...