HP 85662A, Troubleshooting And Repair Manual

Page: 138 / 594

words on A pattern is also output to the X and Y line generator registers on
The program does not read any input ports; Multiplexer Bus Drivers on are the only
talkers on the Digital Storage data bus.
Test Program 4
to
test qualifier bit
LL FULL CW
This is the overall check program used to test all the Digital Storage input ports. The
program generates the signals to check the memory, IOB data, IOB address, LTSTA, LTSTB,
and ADC inputs on the bus. For each input, a clock is selected corresponding to each input
putting data on the bus. This is done by positioning the jumper plug at the proper position in
the IC socket
For example, to check Memory, the jumper is put at pin 3, connecting
pin 3 to pin 12. This program requires that the Data Manipulator assembly be working
and the Digital Storage bus be good.
Test Program 5
to test qualifier bit
LL FULL CW
removed
This program is used to generate a simple ramp waveform for the X and Y Line Generators
and also to generate simple repetitive control signals to the
Track and Hold assembly.
It is also used to check the Buffer on the Data Manipulator assembly. The X and Y
ramp waveforms are 20 ms long when is fully CW (long line) and 5 ms long when
is fully CCW (short line). See Troubleshooting for a diagram of the
control signals. is removed to let the HSWP line go high, for troubleshooting.
Test Program 6
to test qualifier bit
LL FULL CW
removed
This program is almost identical to Test Program 5, except that the HOLD line to is
normally high, going low to reset the hold capacitor and peak detectors only every 80 ms.
This can be used to check hold times. In addition, the CRT trace will be in the blink mode,
blinking once a second.
Figure l-2 shows the CRT displays for the various Test Programs. They are not meant to
verify that each test is running correctly, but rather to assure you that the test program is
cycling. With caution, they can also be used to do some short-cutting in the overall Digital
Storage troubleshooting procedure.
For example, the memory check, the IOB interface checks, the ADC check, Test A and Test B
checks should not be done if the Test Program 4 trace is not on the CRT. On the other hand,
if the traces for Test Programs 3, 4, and 5 appear correct, then the Main Control and Data
Manipulator checks could be temporarily bypassed and the memory or IOB interface checks
performed. (However, if these checks have bad inputs or the fault cannot be found, then the
Main Control and Data Manipulator assemblies must be verified as shown in the
complete Digital Storage troubleshooting procedure.)
A3 5