Fast Sweep Time Control
Data on Instrument Bus lines 11 through 14 specify the fast sweep generator sweep time. This
data is latched into hex D flip-flop U6 when Address 51 is strobed. (Refer to the table, Note
6 on the schematic, for coding of the sweep time control lines.) Data on Instrument Bus line
15 is latched into U6 with the four sweep time bits
and enables fast sweep
generator operation.
Switchable Current Source
Current for the generation of the fast sweep ramp is supplied by Q13. Op amp U8 regulates
(through R6 and R7) the emitter voltage of Q13 to keep it equal to the reference voltage at
U8 pin 3.
controls the reference voltage by switching R2 in or out of the voltage divider circuit,
which is made up of
R2, and R3. The voltage difference between Q13 emitter and
is set at 2 V when
is off and 4 V when is on. The voltage difference is held
across a switchable resistance between Q13 emitter and
FET switches Q7,
and
connect resistors in parallel with R14 to change the current supplied by the current source.
When Q7,
and
are off, R14 sets Q13 collector current. In certain sweep times, is
turned on by
(Refer to the table on the schematic, Note 6.) This places
in parallel
with R14, increasing the current by a factor of 5. Similarly, R12 or R13 may be switched in
to increase current by factors of 10 and 50 respectively. Q7,
and are controlled by
open-collector drivers
and
The FET switches are on when the FET gate
voltage is high
V) and off when the FET gate voltage is low (approximately
V).
decodes the sweep rate control lines from U6 and controls
and
Fast Sweep Generator
To produce the fast sweep ramp for sweep times
current from Q13 charges timing
capacitor C4. For sweep times of 200 to 10 ms,
is turned on, placing timing capacitor
C5 in parallel with C4, increasing the sweep time by a factor of 100. C4 and C5 (if it is in the
circuit) are discharged by
and Q12 at the end of the sweep.
Discharge Switch
When no sweep is in progress, the output of open-collector inverter
is high
V), and
current through R30 and R31 flow into
and through CR6 into Q12. In addition, current
flows from Q13 into Q12. At the start of a fast sweep ramp,
pin 8 goes low, and the
voltage at the anode of CR6 and the emitter of
is pulled slightly negative by R32. CR6
becomes reverse biased, and
turns off, turning Q12 off. Current from the collector of Q13
now flows into timing capacitors C4 and C5, and the sweep ramp begins. When the end of
the sweep ramp
V) is detected by the Fast Sweep Control circuit,
pin 8 goes high
(about
V), turning
on. This turns Q12 on, and it begins to discharge C4 and C5.
Q12 continues to discharge the timing capacitors until CR6 becomes forward biased. At that
time, the circuit reaches equilibrium, holding the sweep ramp at near 0 V, with the offset
adjusted by R34.
Fast Sweep Buffer Amplifier
Op amp U14 is connected as a unity gain buffer amplifier, which provides the low impedance
fast sweep ramp output (FS OUT). FS OUT is applied to the X-axis scan multiplexer in
Intensity Control.
4
Summary of Contents for 85662A
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Page 409: ...Table 4 Video Bandwidth Truth Table 6 A4A9 ...
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Page 452: ...A4A6A2 Output Driver Component Locations 85662 60170 Option 067 Tab ...
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Page 473: ...Table 4 Video Bandwidth Truth Table Option H96 3 ...
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Page 594: ...HEWLETT PACKARD HP Part No 85662 90085 Printed in USA ...