Holtek HT46R003B, Manual, Page: 9 / 76

Rev. 1.00 8 ��ne 1�� �01� Rev. 1.00 � ��ne 1�� �01�
HT46R003B
Cost-Effective A/D 8-bit OTP MCU
HT46R003B
Cost-Effective A/D 8-bit OTP MCU
A.C. Characteristics
Ta=�5°C
Symbol Parameter
Test Conditions
Min. Typ. Max. Unit
V
DD
Conditions
f
SYS
System clock �.3V~5.5V — 8 MHz
f
HIRC
System clock (HIRC)
3V/5V Ta=�5°C -�% 8 +�% MHz
3V/5V Ta=0°C~70°C -5% 8 +5% MHz
3.0V~5.5V Ta=0°C~70°C -8% 8 +8% MHz
3.0V~5.5V Ta=-�0°C~85°C -1�% 8 +1�% MHz
f
TIMER
Timer I/P freq�ency (TMR) 3.3V~5.5V — 0 — 8 MHz
t
WDTOSC
Watchdog oscillator period
3V — �5 �0 180 μs
5V — 3� 65 130 μs
t
RES
External reset low p�lse width — — 1 — — μs
t
RESF
External reset low p�lse width (with filter) — — — 150 — ns
t
SST
System start-�p timer period — Wake-�p from halt — 16 — t
SYS
t
LVR
Low Voltage Width to Reset — — 0.�5 1 � ms
t
RSD
System Reset Delay Time (All Reset) — — �5 50 100 ms
Note: 1. t
SYS
= 1/f
SYS
2. To maintain the accuracy of the internal HIRC oscillator frequency, a 0.1μF decoupling capacitor should
be connected between VDD and VSS and located as close to the device as possible.
A/D Converter Characteristics
Ta=�5°C
Symbol Parameter
Test Conditions
Min. Typ. Max. Unit
V
DD
Conditions
AV
DD
Analog operating voltage — V
REF
=V
DD
�.7 — 5.5 V
V
AD
A/D Inp�t Voltage — — 0 — AV
DD
/V
REF
V
DNL A/D Differential Non-linearity
�.7V
V
REF
=V
DD
=AV
DD
t
AD
=0.5 μ s
-� — +� LSB 3V
5V
INL A/D Integral non-linearity
�.7V
V
REF
=V
DD
=AV
DD
t
AD
=0.5 μ s
-� — +� LSB 3V
5V
I
ADC
Additional Power Cons�mption if
A/D Converter is �sed
3V
No load (t
AD
=0.5μs)
— 0.5 — mA
5V — 0.6 — mA
t
AD
A/D Converter Clock Period �.7V~5.5V — 0.5 — 10 μs
t
ADC
A/D Conversion Time
(Incl�de Sample and Hold Time) �.7V~5.5V 1�-bit A/D Converter
— 16 — t
AD
t
ON�ST
A/D Converter On-to-Start Time �.7V~5.5V — � — — μs
Note: A/D conversion time (t
AD
) = n (bits ADC) + 4 (sampling time), the conversion for each bit needs one ADC
clock (t
AD
).