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HT46R003B
Cost-Effective A/D 8-bit OTP MCU
HT46R003B
Cost-Effective A/D 8-bit OTP MCU
When the Timer/Event Counter is read, or if data is written to the preload register, the clock is
inhibited to avoid errors, however as this may result in a counting error, this should be taken into
account by the programmer. Care must be taken to ensure that the timers are properly initialised
before using them for the first time. The associated timer enable bits in the interrupt control
register must be properly set otherwise the internal interrupt associated with the timer will remain
inactive. The edge select, timer mode and clock source control bits in timer control register must
also be correctly set to ensure the timer is properly configured for the required application. It is
also important to ensure that an initial value is first loaded into the timer registers before the timer
is switched on; this is because after power-on the initial values of the timer registers are unknown.
After the timer has been initialised the timer can be turned on and off by controlling the enable bit in
the timer control register.
When the Timer/Event Counter overflows, its corresponding interrupt request flag in the interrupt
control register will be set. If the Timer/Event Counter interrupt is enabled this will in turn generate
an interrupt signal. However irrespective of whether the interrupts are enabled or not, a Timer/Event
Counter overflow will also generate a wake-up signal if the device is in a Power-down condition. This
situation may occur if the Timer/Event Counter is in the Event Counting Mode and if the external
signal continues to change state. In such a case, the Timer/Event Counter will continue to count
these external events and if an overflow occurs the device will be woken up from its Power-down
condition. To prevent such a wake-up from occurring, the timer interrupt request flag should first be
set high before issuing the “HALT” instruction to enter the Sleep Mode.
Timer Program Example
The program shows how the Timer/Event Counter registers are set along with how the interrupts are
enabled and managed. Note how the Timer/Event Counter is turned on, by setting bit 4 of the Timer
Control Register. The Timer/Event Counter can be turned off in a similar way by clearing the same
bit. This example program sets the Timer/Event Counters to be in the timer mode, which uses the
internal system clock as their clock source.
PFD Programming Example
org 04h ; external interrupt vector
org 08h ; Timer/Event Counter interrupt vector
jmp tmrint ; jump here when Timer overflows
: :
org 20h ; main program
: :
;
internal
Timer
interrupt
routine
tmrint:
:
;
Timer
main
program
placed
here
:
begin:
;
set
Timer
registers
mov a,09bh ; set Timer preload value
mov tmr,a
mov a,081h ; set Timer control register
mov tmrc,a ; timer mode and prescaler set to /2
mov a, 0c0H ; select f
SYS
for the TMR clock source
mov wdtc, a
;
set
interrupt
register
mov a,05h ; enable master interrupt and both timer interrupts
mov intc0,a
: :
set tmrc.4 ; start Timer
: :