Rev. 1.00
150
October 26, 2018
Rev. 1.00
151
October 26, 2018
BS86DH12C
High Voltage Touch A/D Flash MCU with HVIO
BS86DH12C
High Voltage Touch A/D Flash MCU with HVIO
Framing Error – FERR
The read only framing error flag, FERR, in the USR register, is set if a zero is detected instead of
stop bits. If two stop bits are selected, both stop bits must be high; otherwise the FERR flag will
be set. The FERR flag and the received data will be recorded in the USR and TXR_RXR registers
respectively, and the flag is cleared in any reset.
Parity Error – PERR
The read only parity error flag, PERR, in the USR register, is set if the parity of the received word is
incorrect. This error flag is only applicable if the parity is enabled, PREN=1, and if the parity type,
odd or even is selected. The read only PERR flag and the received data will be recorded in the USR
and TXR_RXR registers respectively. It is cleared on any reset, it should be noted that the flags,
FERR and PERR, in the USR register should first be read by the application program before reading
the data word.
UART Interrupt Structure
Several individual UART conditions can generate a UART interrupt. When these conditions exist,
a low pulse will be generated to get the attention of the microcontroller. These conditions are a
transmitter data register empty, transmitter idle, receiver data available, receiver overrun, address
detect and an RX pin wake-up. When any of these conditions are created, if the global interrupt
enable bit and its corresponding interrupt control bit are enabled and the stack is not full, the
program will jump to its corresponding interrupt vector where it can be serviced before returning to
the main program. Four of these conditions have the corresponding USR register flags which will
generate a UART interrupt if its associated interrupt enable control bit in the UCR2 register is set.
The two transmitter interrupt conditions have their own corresponding enable control bits, while the
two receiver interrupt conditions have a shared enable control bit. These enable bits can be used to
mask out individual UART interrupt sources.
The address detect condition, which is also a UART interrupt source, does not have an associated
flag, but will generate a UART interrupt when an address detect condition occurs if its function is
enabled by setting the ADDEN bit in the UCR2 register. An RX pin wake-up, which is also a UART
interrupt source, does not have an associated flag, but will generate a UART interrupt if the UART
clock (f
H
) source is switched off and the WAKE and RIE bits in the UCR2 register are set when a
falling edge on the RX pin occurs.
Note that the USR register flags are read only and cannot be cleared or set by the application
program, neither will they be cleared when the program jumps to the corresponding interrupt
servicing routine, as is the case for some of the other interrupts. The flags will be cleared
automatically when certain actions are taken by the UART, the details of which are given in the
UART register section. The overall UART interrupt can be disabled or enabled by the related
interrupt enable control bits in the interrupt control registers of the microcontroller to decide whether
the interrupt requested by the UART module is masked out or allowed.