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548
High
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mode
CRT
address
CRTC
outputs
each
signal
to
output
terminal
internal
register
by
software.
Fig.
6-8
shows
CRTC
and
timing
chart
of
each
output
signal
of
fig.
6-11,
fig.
6-12
and
fig.
6-13.
The
IC47,
Validate
the
output
address
signal
when
power
i
6-4-6
Interlace/Non
Interlace
switching
circui
Fig.
6-14
shows
the
interlace/non-interlace
swi
by
writing
the
data
to
each
the
internal
registers
of
each
mode
in
CRTC
is
shown
at
IC49
and
ICSO
is
the
circuit
to
s
on
at
80
character
mode.
t
tching
circuit.
To
switching
of
the
interlace
mode
(vertical
direction
display
mode)
and
the
non-interlace
mode
is
done
by
changing
the
write
value
in
internal
register
of
CRTC.
The
raster
address
RA0-RA3
from
CRTC
has
different
raster
address
value
in
each
mode
which
is
described
at
CRTC
block
chapter.
In
this
circuit,
the
raster
address
from
CRTC
is
outputted
after
conversion
to
raster
address
of
RAA1-RAA3
which
has
no
relationship
to
both
modes.
(1)
By
the
rising
edge
of
system
I/O
address
decorder
output
INTERACE
SEL,
the
data
D3
of
MPU
is
latched
by
IC130,
then
switches
by
ICl46
to
make
the
raster
address
equal
in
both
mode.
(2)
Output
Q
of
IC13O
goes7’H"_level
when
interlace
mode
then
B
input
side
of
ICl4l
is
selected
and
outputted
from
IC14l.
On
the
other
hand
in
case
of
the
non-interlace
mode,
output
Q
of
ICl3O
becomes"L"level
and
A
input
side
of
the
IC14l
is
selected
and
outputted
from
ICl4l.
The
wave
form
of
the
raster
address
RAA1-RAA3
after
the
switch
is
shown
at
fig.
6-l5.
65
Summary of Contents for MB-6890
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