Hitachi MB-6890, Service Manual

Page: 14 / 123

*
Non
Maskable
Interrupt (NMI)
A
negative
edge
on
this
input requests
that
a
nonmaskable interrupt
sequence
be generated.
Anon-maskeble
interrupt
cannot
be
inhibited
by
the
program,
and also
has
a
higher priority
than
E I R Q , I R Q
or
software
interrupt.
*
Fast-Interrupt Request(FIRQ)
A Low level
on
this
input pin
will initiate
provided
its
mask bit(F) in the
CC is_§lear.
over
the
standard
Interrupt
Request(IRQ),and
it stacks
only
the
contents
of the condition
program
counter.
*
Interrupt
Request(I§Q)
A Low level input
on
this
pin
will initiate
provided the mask bit(I) in
the CC
is
clear.
a
fast interrupt
sequence
This
sequence
has
priority
is
fast
in
the
sense
that
code
register and
the
an
interrupt
Request
sequence
Since
IRQ
stacks the entire
machine
state
it
provides
a
slower
response
to interrupt than
FIRQ,IRQ
also has
a
lower priority than
FIRQ.
*
E, Q
E
is similar
to
theHD468OO bus
timing signal
§Z52;Q
is
a
quadrature
clock signal which leads E.Address
from the MPU will be valid with
the
leading edge of
Q. Data
is latched
on
the
falling edge of
E.
*MRDY
This
input control signal allows
stretching of E and
Q to
extend data
access
time.
*
DMA/BREQ
_
The
DMA/BREQ input provides
fa
method of
suspending
execution
and
acquiring the
MPU bus
for
another
use.
Typical
uses
include
DMA and
dynamic
memory
refresh. When
BA
goes
Low,
the
DMA
device should be
taken off the
bus.
~HD45821E
(PIA
3
Peripheral Interface
Adapter)
*
PIA INTERFACE SIGNALS FOR
MPU
(U
pin
arrangement
_
,___ __
__. ._
_ _ _ ._ _ .
K
FLA
aleuirectional uataLD»~jU7)
(GNDHM CA’
The
bi-directional data
Qines
PM CM
(D6’D7)allow
the transfer of
PM
WOT
data between the
MPU and the
PIA.
PM %§
The data bus
output
drivers
are
PM R50
three
state
devices
that remain
PM RS,
in the high
impedance(off)
state
,As m
exception when the
MPU performs
PM 0
a
PIA read operation.
PA1
32 D1
no
HD46821P
nz
*
PIA Enable(E)
Pm
(Pm)
DJ The
enable
pulse,E,
is the
only
N215 FED#
I
timing signal that is
supplied
P91 05
to the PIA. Timing of all other
PB*
D6
signals
is
referenced
to
the
leading
:Es Z
and trailing
edges
of the
E pulse.
6
Q
*
PIA Read/wri§;e
C82 CSD
This
signal
is
generated by
the
(5\/WEE: : RM
MPU to control the direction of
T2