Hirschmann 943 893-321, Manual

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11
3 Tristate recognition through permanent highHigh
Version 1.0 03/06
3 Tristate recognition through permanent high
Fig. 3: Tristate recognition through permanent high
Data
K 1
R
R
PD
R
PU
typ. 220
Ω
typ. 390
Ω
typ. 390
Ω
RT+
RT–
K1–
K1+
Port 1 K 1
Port 3 Port 2
Data
K 1
R
R
PD
R
PU
typ. 220
Ω
typ. 390
Ω
typ. 390
Ω
RT+
RT–
K1–
K1+
Port 1 K 1
Port 3 Port 2
One 2-wire lead, terminated by a characteristic impe-
dence and additional pull-up/pull-down resistors, is
replaced (e.g. PROFIBUS).
During the idle phase, a logical high level (positive volt-
age between terminals K1+ and K1-) is available. As
soon as a constant high level is available for 2.5 µs, the
repeaters identify this as tristate and switch their trans-
mitters to the idle state (transmitter set to high-resist-
ance).
A downward slope is identified as the start bit.
Transmission is made in the appropriate direction.
The opposite direction is disabled.