Electrical aspects common for both solutions
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Note:
function. Due to this fact,
the signals RX and TX may be exchanged.
The following assignment of pins and signals has been made:
Pin
Channel
Ethernet
Signal
Description
46
Ethernet
Channel 0
Ethernet receive line of Port 0.
47
Ethernet
Channel 0
PHY0_TX-
48
Ethernet
Channel 0
Ethernet transmit line of Port 0
49
Ethernet
Channel 0
PHY0_RX-
42
Ethernet
Channel 0
MLED2
This signal controls the Link LED of Ethernet Port
0. The signal is active low and has to be
connected at the cathode of the LED over an
appropriate current resistor.
42
Ethernet
Channel 0
MLED2
This signal controls the Transmit/Receive or
Activity LED of Ethernet Port 0. The signal is
active low and has to be connected at the cathode
of the LED over an appropriate current resistor.
50
Ethernet
Channel 1
Ethernet receive line of Port 1.
51
Ethernet
Channel 1
PHY1_TX-
52
Ethernet
Channel 1
Ethernet transmit line of Port 1
53
Ethernet
Channel 1
TXN1/
PHY1_RX-
43
Ethernet
Channel 1
MLED3
This signal controls the Link LED of Ethernet Port
1. The signal is active low and has to be
connected at cathode of the LED over an
appropriate current resistor.
43
Ethernet
Channel 1
MLED3
This signal controls the Transmit/Receive or
Activity LED of Ethernet Port 1. The signal is
active low and has to be connected at cathode of
the LED over an appropriate current resistor.
Table 8: Ethernet Interface of NRP H90-RE - Assignment of pins and signals
4.3.2
Design recommendations
The Ethernet interface for the netRAPID 90 module can be designed as
follows:
netRAPID 90 | Design guide
DOC190601DG01EN | Revision 1 (Draft 10) | English | 2019-09 | Preliminary | Public
© Hilscher 2019