Electrical aspects for the stand-alone solution
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6
Electrical aspects for the stand-alone solution
6.1
Pin assignment
The following table lists the pin assignment for the NRP H90-RE and the
NRP H90-RE\F8D8 module.
For the
stand-alone solution, the following applies:
·
The APP CPU is available for use by customer.
·
The pin assignment can be adjusted using the tool
netX Studio CDT
.
For position of pin 1, see section Location of pins.
Pin@
NRP
H90
Signal
Shared with
Pin@
netX90
Pull-up/
pull-down/
open
Function for stand-alone solution /
Recommended treatment if unused
1
MII1_TXD2
PIO_APP22 or
SQI0_APP_MISO_B
H9
open
Programmable Input/Output signal,
SQI0: Serial input output data bit 0 signal or
SPI0: Master In / Slave Out signal
2
MII1_TXD3
PIO_APP23 or
SQI0_APP_MOSI_B
H8
open
Programmable Input/Output signal,
SQI0: Serial input output data bit 1 signal or
SPI0: Master Out / Slave In signal
3
MII1_TXD1
PIO_APP21 or
SQI0_APP_CS0N_B
J8
open
Programmable Input/Output signal or
SQI0/SPI0: Chip select 0 signal
4
MII1_TXD0
PIO_APP20 or
SQI0_APP_CLK_B
J9
open
Programmable Input/Output signal or
SQI0/SPI0: Clock signal
5
MII1_RXD1
PIO_APP17 or
SQI0_APP_SIO2_B
G8
open
Programmable Input/Output signal or
SQI0 (only): Serial input/output data bit 2 signal
6
MII1_RXD2
PIO_APP18 or
SQI0_APP_SIO3_B
F9
open
Programmable Input/Output signal or
SQI0 (only): Serial input/output data bit 3 signal
7
HIF_RDN
MMIO16 or
SQI1_APP_SIO2
E2
pu
Multiplex matrix I/O signal
(*)
or
SQI1 (only): Serial input/output data bit 2 signal
leave open if unused
8
HIF_DIRQ
MMIO17 or
SQI1_APP_SIO3
F2
pu
Multiplex matrix I/O signal
(*)
or
SQI1 (only): Serial input/output data bit 2 signal
leave open if unused
9
VSS (GND)
GND
A1,
A12,
F6, F7,
G6, G7
K3,
M12
Power
VSS (Ground)
10
VDDIO
+3V3
A2,
A11,
L1,
L12
Power
VDDIO (Power supply voltage)
11
HIF_D15
MMIO15,
SQI1_APP_MOSI or
MLED11
A6
pu
Multiplex matrix I/O signal
(*)
,
SQI1: Serial input output data bit 1 signal,
SPI1: Master Out / Slave In signal or
Status LED
12
HIF_D14
MMIO14,
SQI1_APP_MISO or
MLED10
B6
pu
Multiplex matrix I/O signal
(*)
,
SQI1: Serial input output data bit 0 signal,
SPI1: Master In / Slave Out signal or
Status LED
13
HIF_D13
MMIO13,
SQI1_APP_CLK or
MLED9
C6
pu
Multiplex matrix I/O signal
(*)
,
SQI1/SPI1: Clock signal or
Status LED
netRAPID 90 | Design guide
DOC190601DG01EN | Revision 1 (Draft 10) | English | 2019-09 | Preliminary | Public
© Hilscher 2019
