Guardian G25AMK005, Technical Manual

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G U A R D I A N V H F 1 1 0 W M O B I L E 2-11
There are two 45 MHz IF amplifier circuits. The first (Q2, T2, etc.) utilizes loss-less feedback to deliver reasonable
gain, low-noise figure, and a high third order intercept point simultaneously. Typical gain is 10.5 dB for the first IF
amplifier.
There are two crystal BPFs and a second 45 MHz IF amplifier. The BPFs provide attenuation for the adjacent and
alternate channels, and also for the second image response. FL1 is a four-pole crystal filter with a 20 kHz
bandwidth centered at 45 MHz. FL4 is a two-pole crystal filter with a 30 kHz bandwidth centered at 45 MHz. The
second 45 MHz IF amplifier provides high gain to prevent further degradation of receive sensitivity. C57, L12,
C18, C19, and L13 are impedance matching elements for the input of FL1. The output of FL1 is impedance
matched to the second 45-MHz IF amplifier (Q36, etc.) by C285, L64, and C242.
The output of the second 45-MHz IF amplifier is impedance matched to FL4 by C287, L61, C286, C237, L60, and
C235
. The entire cascade provides 21 dB of gain and has a 3 dB bandwidth of 20 kHz typically. Typical insertion
loss is 1.5 dB for each crystal BPF.
The IF IC (U28) contains the second mixer and an IF amplifier chain. The 45 MHz IF signal enters U28 at pin 6
from the crystal BPF (FL4). FL4 is impedance matched to the IF IC input by C294, L62, and C288. The incoming
45 MHz IF signal is mixed with the second LO (to be discussed later). The second mixer IF output is at U28, pin 8
and the second IF frequency is 455 kHz.
The signal from U28-8 is routed to FL3. FL3 is a ceramic BPF operating at 455 kHz. The insertion loss of the
ceramic BPF is 6 dB typically in a 1500-ohm system.
The 455 kHz IF signal enters U28-10, is amplified by a cascade of IF amplifiers, and exits at U28-14. The signal
from U28-14 then enters a second ceramic BPF, FL2. FL2 is the final ceramic BPF with a typical insertion loss of 8
dB in a 1000-ohm system. The 455 kHz IF signal enters its final stage of amplification at U29-3. U29 is configured
as a non-inverting operational amplifier and is capable of driving a 50-ohm load. The amplifier is set for a voltage
gain of 2.5. With the receiver set to full gain the signal level at J4 (455 kHz IF OUT MONITOR) is -20 dBm
" 3 dB
into 50 ohm with a -119 dBm unmodulated 136 MHz signal injected at J2 (TOP RF) or J3 (SIDE RF). The second
LO consists of CR26, R33, Y1, L24, C59, C226, C227, and Q35. The oscillator is a Colpitts type with the crystal
operating in the series mode. CR24 is a varactor diode used to set the oscillator on frequency using the DAC output
labeled 2
nd
LO. The second LO operating frequency is 44.545 MHz (low-side injection). L65 and C223 impedance
match the output of Q35 to the LPF (C289, C293, L63, and C284). The signal is attenuated by R282, R283, and
R284 and sent on to the second mixer. The signal level at U28-4 is -16 dBm nominal.
U4 is a voltage regulator used to power the receiver circuits. The dc voltage appearing at U4, pin 1, labeled
RXSINK on the schematic diagram, is routed from the antenna PIN diode switch. As previously discussed, the PIN
diode switch and the receiver circuits share current to reduce receive power consumption. The control line +3.3V
RXEN is used to enable the regulator while the transceiver is in the receive mode of operation. The regulator is
disabled during the transmit mode of operation.
2.5.2.1 Synthesizer and Reference Oscillator
U19 is a fractional-N synthesizer IC programmed for a specific frequency by loading appropriate serial data into the
IC. It controls the receive VCO when the transceiver is in the receive mode of operation, and the transmit VCO
when in the transmit mode. The programming lines are labeled 3VSCL, 3VSDA and 3VSYNTHENA on the
schematic diagram. These are all CMOS logic level inputs. R118 (RF) and R123 (RN) are the fractional
compensation and phase detector current setting resistors, respectively. These resistors are critical to the operation
of the synthesizer system and must be checked when troubleshooting around U19. The phase detector output pins
(U19-13 and U19-14) are fed to the passive loop filter (R140, C177, C172, R134, and C173) and on to the VCO
control varactor diodes (CR17/CR19) for frequency control. The buffered, filtered output from the VCO is fed into
U19-5 (RF IN) to close the phase-locked-loop. The level is typically -10 dBm into U19-5. The reference oscillator
is made up of CR22, Y2, Q28, C197, and C198 and associated components. The reference oscillator operates at
12.8 MHz. The reference oscillator operating frequency is adjusted by varying the dc voltage at the DAC controlled
line that is labeled REFOSCMOD. This line is also used to modulate the reference oscillator during the
transceiver’s transmit mode of operation. The 12.8 MHz signal is fed into the synthesizer chip at U19-8 (REF IN)
using a coupling capacitor, C194. The AC signal level at U19-8 is 1V p-p typically.