k
2 - 22
GRUNDIG Service
Descriptions
GDV 100 D
Only signals used in this application will be described
Pin
Name
Function
VCC
Power 5V
GND
Ground
16
HACKN
Host acknowledge: pulled high when it is not in use
27
HOREQN
Host request: pulled high when it is not in use
30
ADO
Audio Data Output
31
ACI
Audio transmitter clock input
38
PINITN
PLL initialization
40
PCAP
PLL filter capacitor
42
EXTAL
external clock/crystal
43
SCL
I
2
C serial data and acknowledge
45
SDA
I
2
C serial clock
46
RESETN
direct hardware reset of the processor
47
MODA
48
MODB
49
MODC
mode select: to select the DSP’s initial operating mode
57
SDO0
Serial data output 0
59
SCKT
Transmit serial clock
60
WST
Transmit word select
61
SCKR
Receive serial clock
65
WSR
Receive word select
66
SDI1
serial data input 1
68
DSO
debug serial output
69
DSI
debug serial input: pulled down if the OnCE port is in use
70
DSCK
debug serial clock: pulled down if the OnCE port is in use
75
DRN
debug request: pulled up if the OnCE port is not in use
76,79,80
GPIO7
GPIO5
general purpose I/O used for control and handshake
GPIO4
functions between DSP and external circuitry
IC7407
DSP56011: 24-bit DVD Digital Signal Processor
Function Overview
The DSP56011 is a high-performance programmable Digital Signal
Processor (DSP) developed for Digital Versatile Disc (DVD), High-
Definition Television (HDTV), and Advanced Set-top audio decoding.
It is composed of the 24-bit DSP56000 core, memory, and a set of
peripheral modules.
The following peripheral modules are included on the DSP56011:
– Parallel Host Interface: not used in this application.
– Serial Host Interface: connected to the I
2
C-bus
– Serial Audio Interface: provides a synchronous serial interface
allowing the DSP56011 to communicate using a wide range of
standard serial data formats used by audio manufacturers.
– Digital Audio Transmitter: outputs digital audio data in AES/EBU,
CP-340, and IEC958 formats.
– General-Purpose Input/Output: has eight dedicated signal lines that
can be independently programmed to be inputs, standard TTL
outputs, open collector outputs, or disconnected.
The 24-bit DSP56000 core is composed of a data Arithmetic and Logic
Unit, an address generation unit, a program controller, and the busses
that connect them together. An On-chip Emulation port and a Phase-
Lock Loop are integral parts of this processor.
DSP
31
30
75
70
69
68
42
3
91
96
78
84
39
8
17
23
28
15
37
62
87
44
54
64
86
85
83
82
80
79
77
76
26
25
24
22
21
19
7
6
16
13
18
11
9
27
53
12
45
47
48
49
51
73
74
89
90
92
94
95
97
98
99
1
2
4
5
32
33
34
71
72
40
38
35
46
61
59
43
67
66
57
56
55
52
93
100
81
10
20
29
41
14
36
63
88
50
58
65
60
UNIT
X DATA
MEMORY
ADDRESS
GENERATION
PROGRAM
MEMORY
SERIAL
HOST
INTERFACE
SERIAL
AUDIO
INTERFACE
GENERAL
PURPOSE
I/O
PARALLEL
HOST
INTERFACE
DIGITAL
AUDIO
TRANSMITTER
Y DATA
MEMORY
24x24+56
56-BIT MAC
TWO 56-BIT
ACCUMUL.
PROGRAM
ADDRESS
GENERATOR
PROGRAM
DECODE
CONTROL
PROGRAM
INTERRUPT
CONTROL
CLOCK
GENERATOR
DATA ALU
ONCE
PORT
PLL
TM
INTERNAL
DATA
BUS
SWITCH
DSO
DRN
PCAP
EXTAL
PLOCK
PINIT
DSI/OS0
DSCK/OS1
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
NC19
RESETN
NC1
NC2
NC3
NC4
SSN/HA2
MISO/SDA
SCK/SCL
HREQ
WSR
SCKR
SDI0
SDI1
WST
SCKT
SDO0
SDO1
SDO2
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
H0/PB0
H1/PB1
H2/PB2
H3/PB3
H4/PB4
H5/PB5
H6/PB6
H7/PB7
HOA0/PB8
HOA1/PB9
HOA2/PB10
HENN/PB12
AD0
ACI
MOSI/HA0
GNDH3
GNDH2
GNDH1
GNDD3
GNDD2
GNDD1
GNDA3
GNDA2
GNDH4
GNDA1
GNDQ3
GNDQ4
GNDS1
GNDS2
GNDS3
PROGRAM CONTROL UNIT
GNDQ1
GNDQ2
VCCA2
VCCA1
VCCQ4
VCCQ3
VCCQ2
VCCQ1
VCCD1
VCCH2
VCCH1
VCCH3
VCCS1
VCCS2
VCCP2
HOREQN/PB13
MODA/IRQAN
MODB/IRQBN
MODC/NMIN
HACKN/PB14
HR/WN/PB11
7407
DSP56011
